qcacmn: Use only shadow writes for REO remap and WBM HP reg

REO remap register direct writes as part of SAP stop could
result in a NOC error if the UMAC is in low power state.

Fix is to use shadow register writes for REO remap and
WBM HP registers.

Change-Id: Ie515c3d28f4ccdd99a3757808f1ab6c5cf373e3d
CRs-Fixed: 2813105

dp/wifi3.0/dp_ipa.c

@@ -1778,6 +1778,7 @@ QDF_STATUS dp_ipa_enable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
 	return QDF_STATUS_SUCCESS;
 }
 
+#ifdef DEVICE_FORCE_WAKE_ENABLED
 /*
  * dp_ipa_get_tx_comp_pending_check() - Check if tx completions are pending.
  * @soc: DP pdev Context
@@ -1805,6 +1806,7 @@ static bool dp_ipa_get_tx_comp_pending_check(struct dp_soc *soc)
 
 	return (soc->ipa_uc_tx_rsc.alloc_tx_buf_cnt != buf_cnt);
 }
+#endif
 
 QDF_STATUS dp_ipa_disable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
 {
@@ -1819,6 +1821,15 @@ QDF_STATUS dp_ipa_disable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
 		return QDF_STATUS_E_FAILURE;
 	}
 
+	/*
+	 * The tx completions pending check will trigger register read
+	 * for HP and TP of wbm2sw2 ring. There is a possibility for
+	 * these reg read to cause a NOC error if UMAC is in low power
+	 * state. The WAR is to sleep for the drain timeout without checking
+	 * for the pending tx completions. This WAR can be replaced with
+	 * poll logic for HP/TP difference once force wake is in place.
+	 */
+#ifdef DEVICE_FORCE_WAKE_ENABLED
 	while (dp_ipa_get_tx_comp_pending_check(soc)) {
 		qdf_sleep(TX_COMP_DRAIN_WAIT_MS);
 		timeout -= TX_COMP_DRAIN_WAIT_MS;
@@ -1827,6 +1838,9 @@ QDF_STATUS dp_ipa_disable_pipes(struct cdp_soc_t *soc_hdl, uint8_t pdev_id)
 			break;
 		}
 	}
+#else
+	qdf_sleep(timeout);
+#endif
 
 	result = qdf_ipa_wdi_disable_pipes();
 	if (result) {