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@@ -228,7 +228,7 @@ static void dsi_phy_hw_cphy_enable(struct dsi_phy_hw *phy,
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if (cfg->bit_clk_rate_hz <= 1500000000)
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less_than_1500_mhz = true;
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- if (phy->version == DSI_PHY_VERSION_4_2) {
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+ if (phy->version >= DSI_PHY_VERSION_4_2) {
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glbl_rescode_top_ctrl = less_than_1500_mhz ? 0x3d : 0x01;
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glbl_rescode_bot_ctrl = less_than_1500_mhz ? 0x38 : 0x3b;
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} else if (phy->version == DSI_PHY_VERSION_4_1) {
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@@ -336,7 +336,7 @@ static void dsi_phy_hw_dphy_enable(struct dsi_phy_hw *phy,
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if (cfg->bit_clk_rate_hz <= 1500000000)
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less_than_1500_mhz = true;
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- if (phy->version == DSI_PHY_VERSION_4_2) {
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+ if (phy->version >= DSI_PHY_VERSION_4_2) {
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vreg_ctrl_0 = less_than_1500_mhz ? 0x53 : 0x52;
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glbl_rescode_top_ctrl = less_than_1500_mhz ? 0x3c : 0x00;
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glbl_rescode_bot_ctrl = less_than_1500_mhz ? 0x38 : 0x39;
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