diff --git a/msm/dsi/dsi_catalog.c b/msm/dsi/dsi_catalog.c
index 836bfddbe4..6193f62108 100644
--- a/msm/dsi/dsi_catalog.c
+++ b/msm/dsi/dsi_catalog.c
@@ -190,6 +190,7 @@ static void dsi_catalog_phy_3_0_init(struct dsi_phy_hw *phy)
 	phy->ops.dyn_refresh_ops.dyn_refresh_trigger_sel = NULL;
 	phy->ops.dyn_refresh_ops.cache_phy_timings =
 		dsi_phy_hw_v3_0_cache_phy_timings;
+	phy->ops.phy_idle_off = NULL;
 }
 
 /**
@@ -230,6 +231,7 @@ static void dsi_catalog_phy_4_0_init(struct dsi_phy_hw *phy)
 		dsi_phy_hw_v4_0_cache_phy_timings;
 	phy->ops.set_continuous_clk = dsi_phy_hw_v4_0_set_continuous_clk;
 	phy->ops.commit_phy_timing = dsi_phy_hw_v4_0_commit_phy_timing;
+	phy->ops.phy_idle_off = NULL;
 }
 
 /**
@@ -259,6 +261,7 @@ static void dsi_catalog_phy_5_0_init(struct dsi_phy_hw *phy)
 	phy->ops.dyn_refresh_ops.cache_phy_timings = dsi_phy_hw_v5_0_cache_phy_timings;
 	phy->ops.set_continuous_clk = dsi_phy_hw_v5_0_set_continuous_clk;
 	phy->ops.commit_phy_timing = dsi_phy_hw_v5_0_commit_phy_timing;
+	phy->ops.phy_idle_off = dsi_phy_hw_v5_0_phy_idle_off;
 }
 
 /**
diff --git a/msm/dsi/dsi_catalog.h b/msm/dsi/dsi_catalog.h
index f878484f08..c1a0bf96f0 100644
--- a/msm/dsi/dsi_catalog.h
+++ b/msm/dsi/dsi_catalog.h
@@ -308,6 +308,7 @@ void dsi_phy_hw_v5_0_dyn_refresh_pipe_delay(struct dsi_phy_hw *phy,
 
 int dsi_phy_hw_v5_0_cache_phy_timings(struct dsi_phy_per_lane_cfgs *timings,
 				      u32 *dst, u32 size);
+void dsi_phy_hw_v5_0_phy_idle_off(struct dsi_phy_hw *phy);
 void dsi_ctrl_hw_22_configure_cmddma_window(struct dsi_ctrl_hw *ctrl,
 		struct dsi_ctrl_cmd_dma_info *cmd,
 		u32 line_no, u32 window);
diff --git a/msm/dsi/dsi_phy_hw_v5_0.c b/msm/dsi/dsi_phy_hw_v5_0.c
index 3ce77bd8bb..7562d7b4fc 100644
--- a/msm/dsi/dsi_phy_hw_v5_0.c
+++ b/msm/dsi/dsi_phy_hw_v5_0.c
@@ -879,3 +879,11 @@ void dsi_phy_hw_v5_0_set_continuous_clk(struct dsi_phy_hw *phy, bool enable)
 
 	wmb(); /* make sure request is set */
 }
+
+void dsi_phy_hw_v5_0_phy_idle_off(struct dsi_phy_hw *phy)
+{
+	/* enable clamping of PADS */
+	DSI_W32(phy, DSIPHY_CMN_CTRL_4, 0x1);
+	DSI_W32(phy, DSIPHY_CMN_CTRL_3, 0x0);
+	wmb();
+}