samsung-sm8650/android_kernel_samsung_sm8650-modules
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disp: msm: dsi: enable xlog in critical paths

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Enable xlog in critical paths to increase debug coverage.

Change-Id: I177acd3f2c2ab349f533bb9fbd8a8122539d524b
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
This commit is contained in:
Rajeev Nandan
2020-05-04 22:40:45 +05:30
parent 1c5beba30c
commit 19a54c5650
4 changed files with 55 additions and 13 deletions
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15
msm/dsi/dsi_ctrl.c
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@@ -380,6 +380,7 @@ static void dsi_ctrl_flush_cmd_dma_queue(struct dsi_ctrl *dsi_ctrl)
cancel_work_sync(&dsi_ctrl->dma_cmd_wait);
} else {
flush_workqueue(dsi_ctrl->dma_cmd_workq);
SDE_EVT32(SDE_EVTLOG_FUNC_CASE2);
}
}
@@ -432,7 +433,7 @@ static int dsi_ctrl_check_state(struct dsi_ctrl *dsi_ctrl,
int rc = 0;
struct dsi_ctrl_state_info *state = &dsi_ctrl->current_state;
SDE_EVT32(dsi_ctrl->cell_index, op);
SDE_EVT32(dsi_ctrl->cell_index, op, op_state);
switch (op) {
case DSI_CTRL_OP_POWER_STATE_CHANGE:
@@ -1020,6 +1021,7 @@ static int dsi_ctrl_update_link_freqs(struct dsi_ctrl *dsi_ctrl,
DSI_CTRL_DEBUG(dsi_ctrl, "byte_clk_rate = %llu, byte_intf_clk = %llu\n",
byte_clk_rate, byte_intf_clk_rate);
DSI_CTRL_DEBUG(dsi_ctrl, "pclk_rate = %llu\n", pclk_rate);
SDE_EVT32(dsi_ctrl->cell_index, bit_rate, byte_clk_rate, pclk_rate);
dsi_ctrl->clk_freq.byte_clk_rate = byte_clk_rate;
dsi_ctrl->clk_freq.byte_intf_clk_rate = byte_intf_clk_rate;
@@ -1211,6 +1213,7 @@ void dsi_message_setup_tx_mode(struct dsi_ctrl *dsi_ctrl,
* override cmd fetch mode during secure session
*/
if (dsi_ctrl->secure_mode) {
SDE_EVT32(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_CASE1);
*flags &= ~DSI_CTRL_CMD_FETCH_MEMORY;
*flags |= DSI_CTRL_CMD_FIFO_STORE;
DSI_CTRL_DEBUG(dsi_ctrl,
@@ -1333,7 +1336,8 @@ static void dsi_kickoff_msg_tx(struct dsi_ctrl *dsi_ctrl,
u32 hw_flags = 0;
struct dsi_ctrl_hw_ops dsi_hw_ops = dsi_ctrl->hw.ops;
SDE_EVT32(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_ENTRY, flags);
SDE_EVT32(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_ENTRY, flags,
msg->flags);
if (dsi_ctrl->hw.reset_trig_ctrl)
dsi_hw_ops.reset_trig_ctrl(&dsi_ctrl->hw,
@@ -2859,7 +2863,7 @@ void dsi_ctrl_enable_status_interrupt(struct dsi_ctrl *dsi_ctrl,
intr_idx >= DSI_STATUS_INTERRUPT_COUNT)
return;
SDE_EVT32(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_ENTRY);
SDE_EVT32(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_ENTRY, intr_idx);
spin_lock_irqsave(&dsi_ctrl->irq_info.irq_lock, flags);
if (dsi_ctrl->irq_info.irq_stat_refcount[intr_idx] == 0) {
@@ -2892,7 +2896,7 @@ void dsi_ctrl_disable_status_interrupt(struct dsi_ctrl *dsi_ctrl,
if (!dsi_ctrl || intr_idx >= DSI_STATUS_INTERRUPT_COUNT)
return;
SDE_EVT32(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_ENTRY);
SDE_EVT32_IRQ(dsi_ctrl->cell_index, SDE_EVTLOG_FUNC_ENTRY, intr_idx);
spin_lock_irqsave(&dsi_ctrl->irq_info.irq_lock, flags);
if (dsi_ctrl->irq_info.irq_stat_refcount[intr_idx])
@@ -3610,6 +3614,7 @@ int dsi_ctrl_set_host_engine_state(struct dsi_ctrl *dsi_ctrl,
dsi_ctrl->hw.ops.ctrl_en(&dsi_ctrl->hw, false);
}
SDE_EVT32(dsi_ctrl->cell_index, state, skip_op);
DSI_CTRL_DEBUG(dsi_ctrl, "Set host engine state = %d\n", state);
dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_ENGINE, state);
error:
@@ -3653,6 +3658,7 @@ int dsi_ctrl_set_cmd_engine_state(struct dsi_ctrl *dsi_ctrl,
dsi_ctrl->hw.ops.cmd_engine_en(&dsi_ctrl->hw, false);
}
SDE_EVT32(dsi_ctrl->cell_index, state, skip_op);
DSI_CTRL_DEBUG(dsi_ctrl, "Set cmd engine state:%d, skip_op:%d\n",
state, skip_op);
dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_CMD_ENGINE, state);
@@ -3702,6 +3708,7 @@ int dsi_ctrl_set_vid_engine_state(struct dsi_ctrl *dsi_ctrl,
dsi_ctrl->hw.ops.soft_reset(&dsi_ctrl->hw);
}
SDE_EVT32(dsi_ctrl->cell_index, state, skip_op);
DSI_CTRL_DEBUG(dsi_ctrl, "Set video engine state:%d, skip_op:%d\n",
state, skip_op);
dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_VID_ENGINE, state);