From 18d245cad8ec736d685f13be8b3cb86381c715ec Mon Sep 17 00:00:00 2001
From: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Date: Mon, 8 Mar 2021 18:41:10 -0800
Subject: [PATCH] disp: msm: dsi: parse PLL dfps data only if dynamic clock is
 enabled

PLL codes from devicetree are only required if dynamic clock is enabled
for video mode panels. This change ensures that unnecessary error logs are
not seen for all other panels, by parsing the data only if the panel property
is set.

Change-Id: I206520aab65b7a5613909c8ff527e88303533617
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
---
 msm/dsi/dsi_display.c | 8 ++++++++
 msm/dsi/dsi_phy.c     | 9 +++++++++
 msm/dsi/dsi_phy.h     | 6 ++++++
 msm/dsi/dsi_pll.c     | 7 +++++--
 msm/dsi/dsi_pll.h     | 3 +++
 5 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/msm/dsi/dsi_display.c b/msm/dsi/dsi_display.c
index 3fa92cb9ef..88a6bbcf68 100644
--- a/msm/dsi/dsi_display.c
+++ b/msm/dsi/dsi_display.c
@@ -4091,6 +4091,14 @@ static int dsi_display_res_init(struct dsi_display *display)
 			display->panel->host_config.force_hs_clk_lane;
 		phy->cfg.phy_type =
 			display->panel->host_config.phy_type;
+
+		/*
+		 * Parse the dynamic clock trim codes for PLL, for video mode panels that have
+		 * dynamic clock property set.
+		 */
+		if ((display->panel->dyn_clk_caps.dyn_clk_support) &&
+				(display->panel->panel_mode == DSI_OP_VIDEO_MODE))
+			dsi_phy_pll_parse_dfps_data(phy);
 	}
 
 	rc = dsi_display_parse_lane_map(display);
diff --git a/msm/dsi/dsi_phy.c b/msm/dsi/dsi_phy.c
index 7e5069197b..5d7f84a868 100644
--- a/msm/dsi/dsi_phy.c
+++ b/msm/dsi/dsi_phy.c
@@ -1396,6 +1396,15 @@ void dsi_phy_set_continuous_clk(struct msm_dsi_phy *phy, bool enable)
 
 }
 
+/**
+ * dsi_phy_pll_parse_dfps_data() - parse dfps data for PLL
+ * @phy:	DSI PHY handle
+ */
+void dsi_phy_pll_parse_dfps_data(struct msm_dsi_phy *phy)
+{
+	dsi_pll_parse_dfps_data(phy->pdev, phy->pll);
+}
+
 void dsi_phy_drv_register(void)
 {
 	platform_driver_register(&dsi_phy_platform_driver);
diff --git a/msm/dsi/dsi_phy.h b/msm/dsi/dsi_phy.h
index 8e36c70dd4..590a119589 100644
--- a/msm/dsi/dsi_phy.h
+++ b/msm/dsi/dsi_phy.h
@@ -402,4 +402,10 @@ int dsi_phy_pll_toggle(struct msm_dsi_phy *dsi_phy, bool prepare);
  * Return: error code.
  */
 int dsi_phy_dynclk_configure(struct msm_dsi_phy *phy);
+
+/**
+ * dsi_phy_pll_parse_dfps_data() - parse dfps data for PLL
+ * @phy:	DSI PHY handle
+ */
+void dsi_phy_pll_parse_dfps_data(struct msm_dsi_phy *phy);
 #endif /* _DSI_PHY_H_ */
diff --git a/msm/dsi/dsi_pll.c b/msm/dsi/dsi_pll.c
index 5be279a30e..8483c85947 100644
--- a/msm/dsi/dsi_pll.c
+++ b/msm/dsi/dsi_pll.c
@@ -339,10 +339,13 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll)
 		return -EINVAL;
 	}
 
+	return rc;
+}
+
+void dsi_pll_parse_dfps_data(struct platform_device *pdev, struct dsi_pll_resource *pll_res)
+{
 	if (!(pll_res->index)) {
 		if (dsi_pll_parse_dfps_from_dt(pdev, pll_res))
 			dsi_pll_parse_dfps(pdev, pll_res);
 	}
-
-	return rc;
 }
diff --git a/msm/dsi/dsi_pll.h b/msm/dsi/dsi_pll.h
index 1bf208592b..757d54ca77 100644
--- a/msm/dsi/dsi_pll.h
+++ b/msm/dsi/dsi_pll.h
@@ -212,4 +212,7 @@ int dsi_pll_clock_register_5nm(struct platform_device *pdev,
 
 int dsi_pll_init(struct platform_device *pdev,
 				struct dsi_pll_resource **pll_res);
+
+void dsi_pll_parse_dfps_data(struct platform_device *pdev, struct dsi_pll_resource *pll_res);
+
 #endif