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asoc: Add support for 11P2896MHz RX clk config

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1. Update RX CLK config for 11P2896MHz.
2. Add condition to update Droop sel coeffs for 11P28MHz
   and 9P6MHz RX CLK.
3. Upate SWR port config for 44.1Khz sample rate usecase.
4. Unselect RX_TOP.SWR_CTRL(0x6AC0008) for RX CLK 11P28MHz.
5. Update HD2_CTL L/R registers as per latest seq version.

Change-Id: Ifac2c03e3d1bf522fe2a4d942341d9071a1e6239
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
This commit is contained in:
Prasad Kumpatla
2023-01-10 18:25:44 +05:30
parent dff100e61b
commit 17a7fb3f4d
7 changed files with 91 additions and 16 deletions
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6
asoc/codecs/lpass-cdc/lpass-cdc.h
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@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef LPASS_CDC_H
@@ -273,6 +274,7 @@ int lpass_cdc_set_port_map(struct snd_soc_component *component, u32 size, void *
int lpass_cdc_register_event_listener(struct snd_soc_component *component,
bool enable);
void lpass_cdc_wsa_pa_on(struct device *dev, bool adie_lb);
void lpass_cdc_notify_wcd_rx_clk(struct device *dev, bool is_native_on);
bool lpass_cdc_check_core_votes(struct device *dev);
int lpass_cdc_tx_mclk_enable(struct snd_soc_component *c, bool enable);
int lpass_cdc_get_version(struct device *dev);
@@ -357,6 +359,10 @@ static void lpass_cdc_wsa_pa_on(struct device *dev, bool adie_lb)
{
}
static void lpass_cdc_notify_wcd_rx_clk(struct device *dev, bool is_native_on)
{
}
static inline bool lpass_cdc_check_core_votes(struct device *dev)
{
return false;