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qcacmn: Change miscellaneous control register val

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In IPQ501x/QCN9100, the REO fragement destination ring
has moved from the REO GENERAL register to REO MISCELLANEOUS
register. Changes are added int HAL_REO_R0_CONFIG to set
the fragmentaion destination value for IPQ501x/QCN9100.

Change-Id: I868dd0ac5c24217f9778ab9da5c2a3d98d3ea302
This commit is contained in:
Aniruddha Paul
2020-10-09 16:35:53 +05:30
committed by snandini
parent 183dd69628
commit 1719814f01
2 changed files with 36 additions and 15 deletions
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27
hal/wifi3.0/qca5018/hal_5018_rx.h
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@@ -54,23 +54,34 @@
HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO_9, SW_FRAME_GROUP_ID)
#define HAL_REO_R0_CONFIG(soc, reg_val, reo_params) \
do { \
reg_val &= \
~(HWIO_REO_R0_GENERAL_ENABLE_SOFT_REORDER_DEST_RING_BMSK |\
HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK | \
(reg_val) &= \
~(HWIO_REO_R0_GENERAL_ENABLE_AGING_LIST_ENABLE_BMSK |\
HWIO_REO_R0_GENERAL_ENABLE_AGING_FLUSH_ENABLE_BMSK); \
reg_val |= \
HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
SOFT_REORDER_DEST_RING, \
(reo_params)->frag_dst_ring) | \
(reg_val) |= \
HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
AGING_LIST_ENABLE, 1) |\
HAL_SM(HWIO_REO_R0_GENERAL_ENABLE, \
AGING_FLUSH_ENABLE, 1);\
HAL_REG_WRITE((soc), \
HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
HWIO_REO_R0_GENERAL_ENABLE_ADDR( \
SEQ_WCSS_UMAC_REO_REG_OFFSET), \
(reg_val)); \
(reg_val) = \
HAL_REG_READ((soc), \
HWIO_REO_R0_MISC_CTL_ADDR( \
SEQ_WCSS_UMAC_REO_REG_OFFSET)); \
(reg_val) &= \
~(HWIO_REO_R0_MISC_CTL_FRAGMENT_DEST_RING_BMSK); \
(reg_val) |= \
HAL_SM(HWIO_REO_R0_MISC_CTL, \
FRAGMENT_DEST_RING, \
(reo_params)->frag_dst_ring); \
HAL_REG_WRITE((soc), \
HWIO_REO_R0_MISC_CTL_ADDR( \
SEQ_WCSS_UMAC_REO_REG_OFFSET), \
(reg_val)); \
} while (0)
#define HAL_RX_MSDU_DESC_INFO_GET(msdu_details_ptr) \
((struct rx_msdu_desc_info *) \
_OFFSET_TO_BYTE_PTR((msdu_details_ptr), \