Merge "asoc: msm: add support for senary interfaces in dai and routing driver"

asoc/msm-dai-q6-v2.c

@@ -26,6 +26,7 @@
 #define MSM_DAI_TERT_AUXPCM_DT_DEV_ID 3
 #define MSM_DAI_QUAT_AUXPCM_DT_DEV_ID 4
 #define MSM_DAI_QUIN_AUXPCM_DT_DEV_ID 5
+#define MSM_DAI_SEN_AUXPCM_DT_DEV_ID 6
 
 #define MSM_DAI_TWS_CHANNEL_MODE_ONE 1
 #define MSM_DAI_TWS_CHANNEL_MODE_TWO 2
@@ -180,6 +181,22 @@ enum {
 	IDX_QUINARY_TDM_TX_5,
 	IDX_QUINARY_TDM_TX_6,
 	IDX_QUINARY_TDM_TX_7,
+	IDX_SENARY_TDM_RX_0,
+	IDX_SENARY_TDM_RX_1,
+	IDX_SENARY_TDM_RX_2,
+	IDX_SENARY_TDM_RX_3,
+	IDX_SENARY_TDM_RX_4,
+	IDX_SENARY_TDM_RX_5,
+	IDX_SENARY_TDM_RX_6,
+	IDX_SENARY_TDM_RX_7,
+	IDX_SENARY_TDM_TX_0,
+	IDX_SENARY_TDM_TX_1,
+	IDX_SENARY_TDM_TX_2,
+	IDX_SENARY_TDM_TX_3,
+	IDX_SENARY_TDM_TX_4,
+	IDX_SENARY_TDM_TX_5,
+	IDX_SENARY_TDM_TX_6,
+	IDX_SENARY_TDM_TX_7,
 	IDX_TDM_MAX,
 };
 
@@ -194,6 +211,8 @@ enum {
 	IDX_GROUP_QUATERNARY_TDM_TX,
 	IDX_GROUP_QUINARY_TDM_RX,
 	IDX_GROUP_QUINARY_TDM_TX,
+	IDX_GROUP_SENARY_TDM_RX,
+	IDX_GROUP_SENARY_TDM_TX,
 	IDX_GROUP_TDM_MAX,
 };
 
@@ -400,6 +419,10 @@ static int msm_dai_q6_get_tdm_clk_ref(u16 id)
 	case IDX_GROUP_QUINARY_TDM_TX:
 		return atomic_read(&tdm_group_ref[IDX_GROUP_QUINARY_TDM_RX]) +
 			atomic_read(&tdm_group_ref[IDX_GROUP_QUINARY_TDM_TX]);
+	case IDX_GROUP_SENARY_TDM_RX:
+	case IDX_GROUP_SENARY_TDM_TX:
+		return atomic_read(&tdm_group_ref[IDX_GROUP_SENARY_TDM_RX]) +
+			atomic_read(&tdm_group_ref[IDX_GROUP_SENARY_TDM_TX]);
 	default: return -EINVAL;
 	}
 }
@@ -507,6 +530,26 @@ int msm_dai_q6_get_group_idx(u16 id)
 	case AFE_PORT_ID_QUINARY_TDM_TX_6:
 	case AFE_PORT_ID_QUINARY_TDM_TX_7:
 		return IDX_GROUP_QUINARY_TDM_TX;
+	case AFE_GROUP_DEVICE_ID_SENARY_TDM_RX:
+	case AFE_PORT_ID_SENARY_TDM_RX:
+	case AFE_PORT_ID_SENARY_TDM_RX_1:
+	case AFE_PORT_ID_SENARY_TDM_RX_2:
+	case AFE_PORT_ID_SENARY_TDM_RX_3:
+	case AFE_PORT_ID_SENARY_TDM_RX_4:
+	case AFE_PORT_ID_SENARY_TDM_RX_5:
+	case AFE_PORT_ID_SENARY_TDM_RX_6:
+	case AFE_PORT_ID_SENARY_TDM_RX_7:
+		return IDX_GROUP_SENARY_TDM_RX;
+	case AFE_GROUP_DEVICE_ID_SENARY_TDM_TX:
+	case AFE_PORT_ID_SENARY_TDM_TX:
+	case AFE_PORT_ID_SENARY_TDM_TX_1:
+	case AFE_PORT_ID_SENARY_TDM_TX_2:
+	case AFE_PORT_ID_SENARY_TDM_TX_3:
+	case AFE_PORT_ID_SENARY_TDM_TX_4:
+	case AFE_PORT_ID_SENARY_TDM_TX_5:
+	case AFE_PORT_ID_SENARY_TDM_TX_6:
+	case AFE_PORT_ID_SENARY_TDM_TX_7:
+		return IDX_GROUP_SENARY_TDM_TX;
 	default: return -EINVAL;
 	}
 }
@@ -674,6 +717,38 @@ int msm_dai_q6_get_port_idx(u16 id)
 		return IDX_QUINARY_TDM_RX_7;
 	case AFE_PORT_ID_QUINARY_TDM_TX_7:
 		return IDX_QUINARY_TDM_TX_7;
+	case AFE_PORT_ID_SENARY_TDM_RX:
+		return IDX_SENARY_TDM_RX_0;
+	case AFE_PORT_ID_SENARY_TDM_TX:
+		return IDX_SENARY_TDM_TX_0;
+	case AFE_PORT_ID_SENARY_TDM_RX_1:
+		return IDX_SENARY_TDM_RX_1;
+	case AFE_PORT_ID_SENARY_TDM_TX_1:
+		return IDX_SENARY_TDM_TX_1;
+	case AFE_PORT_ID_SENARY_TDM_RX_2:
+		return IDX_SENARY_TDM_RX_2;
+	case AFE_PORT_ID_SENARY_TDM_TX_2:
+		return IDX_SENARY_TDM_TX_2;
+	case AFE_PORT_ID_SENARY_TDM_RX_3:
+		return IDX_SENARY_TDM_RX_3;
+	case AFE_PORT_ID_SENARY_TDM_TX_3:
+		return IDX_SENARY_TDM_TX_3;
+	case AFE_PORT_ID_SENARY_TDM_RX_4:
+		return IDX_SENARY_TDM_RX_4;
+	case AFE_PORT_ID_SENARY_TDM_TX_4:
+		return IDX_SENARY_TDM_TX_4;
+	case AFE_PORT_ID_SENARY_TDM_RX_5:
+		return IDX_SENARY_TDM_RX_5;
+	case AFE_PORT_ID_SENARY_TDM_TX_5:
+		return IDX_SENARY_TDM_TX_5;
+	case AFE_PORT_ID_SENARY_TDM_RX_6:
+		return IDX_SENARY_TDM_RX_6;
+	case AFE_PORT_ID_SENARY_TDM_TX_6:
+		return IDX_SENARY_TDM_TX_6;
+	case AFE_PORT_ID_SENARY_TDM_RX_7:
+		return IDX_SENARY_TDM_RX_7;
+	case AFE_PORT_ID_SENARY_TDM_TX_7:
+		return IDX_SENARY_TDM_TX_7;
 	default: return -EINVAL;
 	}
 }
@@ -1061,6 +1136,14 @@ static int msm_dai_q6_auxpcm_prepare(struct snd_pcm_substream *substream,
 				aux_dai_data->clk_set.clk_id =
 					Q6AFE_LPASS_CLK_ID_QUIN_PCM_EBIT;
 			break;
+		case MSM_DAI_SEN_AUXPCM_DT_DEV_ID:
+			if (pcm_clk_rate)
+				aux_dai_data->clk_set.clk_id =
+					Q6AFE_LPASS_CLK_ID_SEN_PCM_IBIT;
+			else
+				aux_dai_data->clk_set.clk_id =
+					Q6AFE_LPASS_CLK_ID_SEN_PCM_EBIT;
+			break;
 		default:
 			dev_err(dai->dev, "%s: AUXPCM id: %d not supported\n",
 				__func__, dai->id);
@@ -1438,6 +1521,33 @@ static struct snd_soc_dai_driver msm_dai_q6_aux_pcm_dai[] = {
 		.probe = msm_dai_q6_aux_pcm_probe,
 		.remove = msm_dai_q6_dai_auxpcm_remove,
 	},
+	{
+		.playback = {
+			.stream_name = "Sen AUX PCM Playback",
+			.aif_name = "SEN_AUX_PCM_RX",
+			.rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000),
+			.formats = SNDRV_PCM_FMTBIT_S16_LE,
+			.channels_min = 1,
+			.channels_max = 1,
+			.rate_max = 16000,
+			.rate_min = 8000,
+		},
+		.capture = {
+			.stream_name = "Sen AUX PCM Capture",
+			.aif_name = "SEN_AUX_PCM_TX",
+			.rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000),
+			.formats = SNDRV_PCM_FMTBIT_S16_LE,
+			.channels_min = 1,
+			.channels_max = 1,
+			.rate_max = 16000,
+			.rate_min = 8000,
+		},
+		.id = MSM_DAI_SEN_AUXPCM_DT_DEV_ID,
+		.name = "Sen AUX PCM",
+		.ops = &msm_dai_q6_auxpcm_ops,
+		.probe = msm_dai_q6_aux_pcm_probe,
+		.remove = msm_dai_q6_dai_auxpcm_remove,
+	},
 };
 
 static int msm_dai_q6_spdif_format_put(struct snd_kcontrol *kcontrol,
@@ -4229,6 +4339,11 @@ static int msm_auxpcm_dev_probe(struct platform_device *pdev)
 		dai_data->tx_pid = AFE_PORT_ID_QUINARY_PCM_TX;
 		pdev->id = MSM_DAI_QUIN_AUXPCM_DT_DEV_ID;
 		i = 4;
+	} else if (!strcmp(intf_name, "senary")) {
+		dai_data->rx_pid = AFE_PORT_ID_SENARY_PCM_RX;
+		dai_data->tx_pid = AFE_PORT_ID_SENARY_PCM_TX;
+		pdev->id = MSM_DAI_SEN_AUXPCM_DT_DEV_ID;
+		i = 5;
 	} else {
 		dev_err(&pdev->dev, "%s: invalid DT intf name %s\n",
 			__func__, intf_name);
@@ -4911,6 +5026,9 @@ static int msm_mi2s_get_port_id(u32 mi2s_id, int stream, u16 *port_id)
 		case MSM_QUIN_MI2S:
 			*port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
 			break;
+		case MSM_SENARY_MI2S:
+			*port_id = AFE_PORT_ID_SENARY_MI2S_RX;
+			break;
 		case MSM_INT0_MI2S:
 			*port_id = AFE_PORT_ID_INT0_MI2S_RX;
 			break;
@@ -5516,20 +5634,17 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
 	},
 	{
 		.playback = {
-			.stream_name = "Secondary MI2S Playback SD1",
-			.aif_name = "SEC_MI2S_RX_SD1",
+			.stream_name = "Senary MI2S Playback",
+			.aif_name = "SEN_MI2S_RX",
 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
 			SNDRV_PCM_RATE_16000,
 			.formats = SNDRV_PCM_FMTBIT_S16_LE,
 			.rate_min =     8000,
 			.rate_max =     48000,
 		},
-		.id = MSM_SEC_MI2S_SD1,
-	},
-	{
 		.capture = {
-			.stream_name = "Senary_mi2s Capture",
-			.aif_name = "SENARY_TX",
+			.stream_name = "Senary MI2S Capture",
+			.aif_name = "SENARY_MI2S_TX",
 			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
 			SNDRV_PCM_RATE_16000,
 			.formats = SNDRV_PCM_FMTBIT_S16_LE,
@@ -5542,6 +5657,18 @@ static struct snd_soc_dai_driver msm_dai_q6_mi2s_dai[] = {
 		.probe = msm_dai_q6_dai_mi2s_probe,
 		.remove = msm_dai_q6_dai_mi2s_remove,
 	},
+	{
+		.playback = {
+			.stream_name = "Secondary MI2S Playback SD1",
+			.aif_name = "SEC_MI2S_RX_SD1",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+			SNDRV_PCM_RATE_16000,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE,
+			.rate_min =     8000,
+			.rate_max =     48000,
+		},
+		.id = MSM_SEC_MI2S_SD1,
+	},
 	{
 		.playback = {
 			.stream_name = "INT0 MI2S Playback",
@@ -6523,6 +6650,13 @@ static int msm_dai_q6_tdm_set_clk_param(u32 group_id,
 		else
 			clk_set->clk_id = Q6AFE_LPASS_CLK_ID_QUIN_TDM_EBIT;
 		break;
+	case AFE_GROUP_DEVICE_ID_SENARY_TDM_RX:
+	case AFE_GROUP_DEVICE_ID_SENARY_TDM_TX:
+		if (mode)
+			clk_set->clk_id = Q6AFE_LPASS_CLK_ID_SEN_TDM_IBIT;
+		else
+			clk_set->clk_id = Q6AFE_LPASS_CLK_ID_SEN_TDM_EBIT;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -7045,6 +7179,54 @@ static const struct snd_kcontrol_new tdm_config_controls_data_format[] = {
 	SOC_ENUM_EXT("QUIN_TDM_TX_7 Data Format", tdm_config_enum[0],
 			msm_dai_q6_tdm_data_format_get,
 			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_0 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_1 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_2 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_3 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_4 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_5 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_6 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_7 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_0 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_1 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_2 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_3 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_4 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_5 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_6 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_7 Data Format", tdm_config_enum[0],
+			msm_dai_q6_tdm_data_format_get,
+			msm_dai_q6_tdm_data_format_put),
 };
 
 static const struct snd_kcontrol_new tdm_config_controls_header_type[] = {
@@ -7288,6 +7470,54 @@ static const struct snd_kcontrol_new tdm_config_controls_header_type[] = {
 	SOC_ENUM_EXT("QUIN_TDM_TX_7 Header Type", tdm_config_enum[1],
 			msm_dai_q6_tdm_header_type_get,
 			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_0 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_1 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_2 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_3 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_4 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_5 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_6 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_RX_7 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_0 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_1 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_2 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_3 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_4 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_5 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_6 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
+	SOC_ENUM_EXT("SEN_TDM_TX_7 Header Type", tdm_config_enum[1],
+			msm_dai_q6_tdm_header_type_get,
+			msm_dai_q6_tdm_header_type_put),
 };
 
 static const struct snd_kcontrol_new tdm_config_controls_header[] = {
@@ -7611,6 +7841,70 @@ static const struct snd_kcontrol_new tdm_config_controls_header[] = {
 			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
 			msm_dai_q6_tdm_header_get,
 			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_0 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_1 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_2 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_3 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_4 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_5 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_6 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_RX_7 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_0 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_1 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_2 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_3 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_4 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_5 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_6 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
+	SOC_SINGLE_MULTI_EXT("SEN_TDM_TX_7 Header",
+			SND_SOC_NOPM, 0, 0xFFFFFFFF, 0, 8,
+			msm_dai_q6_tdm_header_get,
+			msm_dai_q6_tdm_header_put),
 };
 
 static int msm_dai_q6_tdm_set_clk(
@@ -7855,6 +8149,14 @@ static int msm_dai_q6_tdm_set_tdm_slot(struct snd_soc_dai *dai,
 	case AFE_PORT_ID_QUINARY_TDM_RX_5:
 	case AFE_PORT_ID_QUINARY_TDM_RX_6:
 	case AFE_PORT_ID_QUINARY_TDM_RX_7:
+	case AFE_PORT_ID_SENARY_TDM_RX:
+	case AFE_PORT_ID_SENARY_TDM_RX_1:
+	case AFE_PORT_ID_SENARY_TDM_RX_2:
+	case AFE_PORT_ID_SENARY_TDM_RX_3:
+	case AFE_PORT_ID_SENARY_TDM_RX_4:
+	case AFE_PORT_ID_SENARY_TDM_RX_5:
+	case AFE_PORT_ID_SENARY_TDM_RX_6:
+	case AFE_PORT_ID_SENARY_TDM_RX_7:
 		tdm_group->nslots_per_frame = slots;
 		tdm_group->slot_width = slot_width;
 		tdm_group->slot_mask = rx_mask & cap_mask;
@@ -7899,6 +8201,14 @@ static int msm_dai_q6_tdm_set_tdm_slot(struct snd_soc_dai *dai,
 	case AFE_PORT_ID_QUINARY_TDM_TX_5:
 	case AFE_PORT_ID_QUINARY_TDM_TX_6:
 	case AFE_PORT_ID_QUINARY_TDM_TX_7:
+	case AFE_PORT_ID_SENARY_TDM_TX:
+	case AFE_PORT_ID_SENARY_TDM_TX_1:
+	case AFE_PORT_ID_SENARY_TDM_TX_2:
+	case AFE_PORT_ID_SENARY_TDM_TX_3:
+	case AFE_PORT_ID_SENARY_TDM_TX_4:
+	case AFE_PORT_ID_SENARY_TDM_TX_5:
+	case AFE_PORT_ID_SENARY_TDM_TX_6:
+	case AFE_PORT_ID_SENARY_TDM_TX_7:
 		tdm_group->nslots_per_frame = slots;
 		tdm_group->slot_width = slot_width;
 		tdm_group->slot_mask = tx_mask & cap_mask;
@@ -7919,7 +8229,7 @@ static int msm_dai_q6_tdm_set_sysclk(struct snd_soc_dai *dai,
 		dev_get_drvdata(dai->dev);
 
 	if ((dai->id >= AFE_PORT_ID_PRIMARY_TDM_RX) &&
-		(dai->id <= AFE_PORT_ID_QUINARY_TDM_TX_7)) {
+		(dai->id <= AFE_PORT_ID_SENARY_TDM_TX_7)) {
 		dai_data->clk_set.clk_freq_in_hz = freq;
 	} else {
 		dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
@@ -7986,6 +8296,14 @@ static int msm_dai_q6_tdm_set_channel_map(struct snd_soc_dai *dai,
 	case AFE_PORT_ID_QUINARY_TDM_RX_5:
 	case AFE_PORT_ID_QUINARY_TDM_RX_6:
 	case AFE_PORT_ID_QUINARY_TDM_RX_7:
+	case AFE_PORT_ID_SENARY_TDM_RX:
+	case AFE_PORT_ID_SENARY_TDM_RX_1:
+	case AFE_PORT_ID_SENARY_TDM_RX_2:
+	case AFE_PORT_ID_SENARY_TDM_RX_3:
+	case AFE_PORT_ID_SENARY_TDM_RX_4:
+	case AFE_PORT_ID_SENARY_TDM_RX_5:
+	case AFE_PORT_ID_SENARY_TDM_RX_6:
+	case AFE_PORT_ID_SENARY_TDM_RX_7:
 		if (!rx_slot) {
 			dev_err(dai->dev, "%s: rx slot not found\n", __func__);
 			return -EINVAL;
@@ -8044,6 +8362,14 @@ static int msm_dai_q6_tdm_set_channel_map(struct snd_soc_dai *dai,
 	case AFE_PORT_ID_QUINARY_TDM_TX_5:
 	case AFE_PORT_ID_QUINARY_TDM_TX_6:
 	case AFE_PORT_ID_QUINARY_TDM_TX_7:
+	case AFE_PORT_ID_SENARY_TDM_TX:
+	case AFE_PORT_ID_SENARY_TDM_TX_1:
+	case AFE_PORT_ID_SENARY_TDM_TX_2:
+	case AFE_PORT_ID_SENARY_TDM_TX_3:
+	case AFE_PORT_ID_SENARY_TDM_TX_4:
+	case AFE_PORT_ID_SENARY_TDM_TX_5:
+	case AFE_PORT_ID_SENARY_TDM_TX_6:
+	case AFE_PORT_ID_SENARY_TDM_TX_7:
 		if (!tx_slot) {
 			dev_err(dai->dev, "%s: tx slot not found\n", __func__);
 			return -EINVAL;
@@ -10090,6 +10416,342 @@ static struct snd_soc_dai_driver msm_dai_q6_tdm_dai[] = {
 		.probe = msm_dai_q6_dai_tdm_probe,
 		.remove = msm_dai_q6_dai_tdm_remove,
 	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM0 Playback",
+			.aif_name = "SEN_TDM_RX_0",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_0",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM1 Playback",
+			.aif_name = "SEN_TDM_RX_1",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_1",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_1,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM2 Playback",
+			.aif_name = "SEN_TDM_RX_2",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_2",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_2,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM3 Playback",
+			.aif_name = "SEN_TDM_RX_3",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_3",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_3,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM4 Playback",
+			.aif_name = "SEN_TDM_RX_4",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_4",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_4,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM5 Playback",
+			.aif_name = "SEN_TDM_RX_5",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_5",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_5,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM6 Playback",
+			.aif_name = "SEN_TDM_RX_6",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_6",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_6,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.playback = {
+			.stream_name = "Senary TDM7 Playback",
+			.aif_name = "SEN_TDM_RX_7",
+			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |
+				SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_RX_7",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_RX_7,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM0 Capture",
+			.aif_name = "SEN_TDM_TX_0",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_0",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM1 Capture",
+			.aif_name = "SEN_TDM_TX_1",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_1",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_1,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM2 Capture",
+			.aif_name = "SEN_TDM_TX_2",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_2",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_2,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM3 Capture",
+			.aif_name = "SEN_TDM_TX_3",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_3",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_3,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM4 Capture",
+			.aif_name = "SEN_TDM_TX_4",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_4",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_4,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM5 Capture",
+			.aif_name = "SEN_TDM_TX_5",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_5",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_5,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM6 Capture",
+			.aif_name = "SEN_TDM_TX_6",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_6",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_6,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
+	{
+		.capture = {
+			.stream_name = "Senary TDM7 Capture",
+			.aif_name = "SEN_TDM_TX_7",
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |
+				SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800,
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
+				   SNDRV_PCM_FMTBIT_S24_LE |
+				   SNDRV_PCM_FMTBIT_S32_LE,
+			.channels_min = 1,
+			.channels_max = 8,
+			.rate_min = 8000,
+			.rate_max = 352800,
+		},
+		.name = "SEN_TDM_TX_7",
+		.ops = &msm_dai_q6_tdm_ops,
+		.id = AFE_PORT_ID_SENARY_TDM_TX_7,
+		.probe = msm_dai_q6_dai_tdm_probe,
+		.remove = msm_dai_q6_dai_tdm_remove,
+	},
 };
 
 static const struct snd_soc_component_driver msm_q6_tdm_dai_component = {

asoc/msm-pcm-routing-v2.h

@@ -162,6 +162,22 @@
 #define LPASS_BE_QUIN_TDM_TX_6 "QUIN_TDM_TX_6"
 #define LPASS_BE_QUIN_TDM_RX_7 "QUIN_TDM_RX_7"
 #define LPASS_BE_QUIN_TDM_TX_7 "QUIN_TDM_TX_7"
+#define LPASS_BE_SEN_TDM_RX_0 "SEN_TDM_RX_0"
+#define LPASS_BE_SEN_TDM_TX_0 "SEN_TDM_TX_0"
+#define LPASS_BE_SEN_TDM_RX_1 "SEN_TDM_RX_1"
+#define LPASS_BE_SEN_TDM_TX_1 "SEN_TDM_TX_1"
+#define LPASS_BE_SEN_TDM_RX_2 "SEN_TDM_RX_2"
+#define LPASS_BE_SEN_TDM_TX_2 "SEN_TDM_TX_2"
+#define LPASS_BE_SEN_TDM_RX_3 "SEN_TDM_RX_3"
+#define LPASS_BE_SEN_TDM_TX_3 "SEN_TDM_TX_3"
+#define LPASS_BE_SEN_TDM_RX_4 "SEN_TDM_RX_4"
+#define LPASS_BE_SEN_TDM_TX_4 "SEN_TDM_TX_4"
+#define LPASS_BE_SEN_TDM_RX_5 "SEN_TDM_RX_5"
+#define LPASS_BE_SEN_TDM_TX_5 "SEN_TDM_TX_5"
+#define LPASS_BE_SEN_TDM_RX_6 "SEN_TDM_RX_6"
+#define LPASS_BE_SEN_TDM_TX_6 "SEN_TDM_TX_6"
+#define LPASS_BE_SEN_TDM_RX_7 "SEN_TDM_RX_7"
+#define LPASS_BE_SEN_TDM_TX_7 "SEN_TDM_TX_7"
 
 #define LPASS_BE_SLIMBUS_7_RX "SLIMBUS_7_RX"
 #define LPASS_BE_SLIMBUS_7_TX "SLIMBUS_7_TX"
@@ -404,6 +420,22 @@ enum {
 	MSM_BACKEND_DAI_QUIN_TDM_TX_6,
 	MSM_BACKEND_DAI_QUIN_TDM_RX_7,
 	MSM_BACKEND_DAI_QUIN_TDM_TX_7,
+	MSM_BACKEND_DAI_SEN_TDM_RX_0,
+	MSM_BACKEND_DAI_SEN_TDM_TX_0,
+	MSM_BACKEND_DAI_SEN_TDM_RX_1,
+	MSM_BACKEND_DAI_SEN_TDM_TX_1,
+	MSM_BACKEND_DAI_SEN_TDM_RX_2,
+	MSM_BACKEND_DAI_SEN_TDM_TX_2,
+	MSM_BACKEND_DAI_SEN_TDM_RX_3,
+	MSM_BACKEND_DAI_SEN_TDM_TX_3,
+	MSM_BACKEND_DAI_SEN_TDM_RX_4,
+	MSM_BACKEND_DAI_SEN_TDM_TX_4,
+	MSM_BACKEND_DAI_SEN_TDM_RX_5,
+	MSM_BACKEND_DAI_SEN_TDM_TX_5,
+	MSM_BACKEND_DAI_SEN_TDM_RX_6,
+	MSM_BACKEND_DAI_SEN_TDM_TX_6,
+	MSM_BACKEND_DAI_SEN_TDM_RX_7,
+	MSM_BACKEND_DAI_SEN_TDM_TX_7,
 	MSM_BACKEND_DAI_INT_BT_A2DP_RX,
 	MSM_BACKEND_DAI_USB_RX,
 	MSM_BACKEND_DAI_USB_TX,