Merge "drm: msm: add dspp caps blob to crtc"
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153926f999
@@ -147,6 +147,7 @@ enum msm_mdp_crtc_property {
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CRTC_PROP_DEST_SCALER_LUT_ED,
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CRTC_PROP_DEST_SCALER_LUT_CIR,
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CRTC_PROP_DEST_SCALER_LUT_SEP,
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CRTC_PROP_DSPP_INFO,
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/* # of blob properties */
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CRTC_PROP_BLOBCOUNT,
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@@ -211,6 +211,35 @@ static bool feature_handoff_mask[SDE_CP_CRTC_MAX_FEATURES] = {
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[SDE_CP_CRTC_DSPP_DITHER] = 1,
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};
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typedef void (*dspp_cap_update_func_t)(struct sde_crtc *crtc,
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struct sde_kms_info *info);
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enum sde_dspp_caps_features {
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SDE_CP_DSPP_CAPS,
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SDE_CP_RC_CAPS,
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SDE_CP_DEMRUA_CAPS,
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SDE_CP_SPR_CAPS,
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SDE_CP_LTM_CAPS,
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SDE_CP_CAPS_MAX,
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};
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static void dspp_idx_caps_update(struct sde_crtc *crtc,
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struct sde_kms_info *info);
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static void rc_caps_update(struct sde_crtc *crtc, struct sde_kms_info *info);
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static void demura_caps_update(struct sde_crtc *crtc,
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struct sde_kms_info *info);
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static void spr_caps_update(struct sde_crtc *crtc, struct sde_kms_info *info);
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static void ltm_caps_update(struct sde_crtc *crtc, struct sde_kms_info *info);
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static dspp_cap_update_func_t dspp_cap_update_func[SDE_CP_CAPS_MAX];
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#define setup_dspp_caps_funcs(func) \
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do { \
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func[SDE_CP_DSPP_CAPS] = dspp_idx_caps_update; \
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func[SDE_CP_RC_CAPS] = rc_caps_update; \
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func[SDE_CP_DEMRUA_CAPS] = demura_caps_update; \
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func[SDE_CP_SPR_CAPS] = spr_caps_update; \
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func[SDE_CP_LTM_CAPS] = ltm_caps_update; \
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} while (0)
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static void _sde_cp_crtc_enable_hist_irq(struct sde_crtc *sde_crtc);
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typedef int (*feature_wrapper)(struct sde_hw_dspp *hw_dspp,
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@@ -1204,6 +1233,9 @@ void sde_cp_crtc_init(struct drm_crtc *crtc)
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if (IS_ERR(sde_crtc->hist_blob))
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sde_crtc->hist_blob = NULL;
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msm_property_install_blob(&sde_crtc->property_info,
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"dspp_caps", DRM_MODE_PROP_IMMUTABLE, CRTC_PROP_DSPP_INFO);
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mutex_init(&sde_crtc->crtc_cp_lock);
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INIT_LIST_HEAD(&sde_crtc->active_list);
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INIT_LIST_HEAD(&sde_crtc->dirty_list);
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@@ -1214,6 +1246,7 @@ void sde_cp_crtc_init(struct drm_crtc *crtc)
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spin_lock_init(&sde_crtc->ltm_lock);
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INIT_LIST_HEAD(&sde_crtc->ltm_buf_free);
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INIT_LIST_HEAD(&sde_crtc->ltm_buf_busy);
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sde_cp_crtc_disable(crtc);
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}
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static void sde_cp_crtc_install_immutable_property(struct drm_crtc *crtc,
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@@ -2070,6 +2103,7 @@ void sde_cp_crtc_install_properties(struct drm_crtc *crtc)
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set_crtc_pu_feature_wrappers);
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setup_check_crtc_pu_feature_wrappers(
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check_crtc_pu_feature_wrappers);
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setup_dspp_caps_funcs(dspp_cap_update_func);
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}
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if (!priv->cp_property)
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goto exit;
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@@ -4242,3 +4276,154 @@ void sde_cp_crtc_vm_primary_handoff(struct drm_crtc *crtc)
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mutex_unlock(&sde_crtc->crtc_cp_lock);
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}
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static void dspp_idx_caps_update(struct sde_crtc *crtc,
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struct sde_kms_info *info)
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{
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struct sde_mdss_cfg *catalog = get_kms(&crtc->base)->catalog;
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u32 i, num_mixers = crtc->num_mixers;
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char blk_name[256];
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if (!catalog->dspp_count || num_mixers > catalog->dspp_count)
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return;
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for (i = 0; i < num_mixers; i++) {
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struct sde_hw_dspp *dspp = crtc->mixers[i].hw_dspp;
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if (!dspp)
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continue;
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snprintf(blk_name, sizeof(blk_name), "dspp%u",
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(dspp->idx - DSPP_0));
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sde_kms_info_add_keyint(info, blk_name, 1);
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}
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}
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static void rc_caps_update(struct sde_crtc *crtc, struct sde_kms_info *info)
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{
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struct sde_mdss_cfg *catalog = get_kms(&crtc->base)->catalog;
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u32 i, num_mixers = crtc->num_mixers;
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char blk_name[256];
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if (!catalog->rc_count || num_mixers > catalog->rc_count)
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return;
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for (i = 0; i < num_mixers; i++) {
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struct sde_hw_dspp *dspp = crtc->mixers[i].hw_dspp;
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if (!dspp || (dspp->idx - DSPP_0) >= catalog->rc_count)
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continue;
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snprintf(blk_name, sizeof(blk_name), "rc%u",
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(dspp->idx - DSPP_0));
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sde_kms_info_add_keyint(info, blk_name, 1);
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}
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}
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static void demura_caps_update(struct sde_crtc *crtc,
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struct sde_kms_info *info)
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{
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struct sde_mdss_cfg *catalog = get_kms(&crtc->base)->catalog;
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u32 i, num_mixers = crtc->num_mixers;
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char blk_name[256];
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if (!catalog->demura_count || num_mixers > catalog->demura_count)
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return;
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for (i = 0; i < num_mixers; i++) {
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struct sde_hw_dspp *dspp = crtc->mixers[i].hw_dspp;
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if (!dspp || (dspp->idx - DSPP_0) >= catalog->demura_count)
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continue;
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snprintf(blk_name, sizeof(blk_name), "demura%u",
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(dspp->idx - DSPP_0));
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sde_kms_info_add_keyint(info, blk_name, 1);
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}
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}
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static void spr_caps_update(struct sde_crtc *crtc, struct sde_kms_info *info)
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{
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struct sde_mdss_cfg *catalog = get_kms(&crtc->base)->catalog;
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u32 i, num_mixers = crtc->num_mixers;
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char blk_name[256];
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if (!catalog->spr_count || num_mixers > catalog->spr_count)
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return;
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for (i = 0; i < num_mixers; i++) {
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struct sde_hw_dspp *dspp = crtc->mixers[i].hw_dspp;
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if (!dspp || (dspp->idx - DSPP_0) >= catalog->spr_count)
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continue;
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snprintf(blk_name, sizeof(blk_name), "spr%u",
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(dspp->idx - DSPP_0));
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sde_kms_info_add_keyint(info, blk_name, 1);
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}
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}
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static void ltm_caps_update(struct sde_crtc *crtc, struct sde_kms_info *info)
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{
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struct sde_mdss_cfg *catalog = get_kms(&crtc->base)->catalog;
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u32 i, num_mixers = crtc->num_mixers;
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char blk_name[256];
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if (!catalog->ltm_count || num_mixers > catalog->ltm_count)
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return;
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for (i = 0; i < num_mixers; i++) {
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struct sde_hw_dspp *dspp = crtc->mixers[i].hw_dspp;
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if (!dspp || (dspp->idx - DSPP_0) >= catalog->ltm_count)
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continue;
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snprintf(blk_name, sizeof(blk_name), "ltm%u",
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(dspp->idx - DSPP_0));
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sde_kms_info_add_keyint(info, blk_name, 1);
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}
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}
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void sde_cp_crtc_enable(struct drm_crtc *drm_crtc)
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{
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struct sde_crtc *crtc;
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struct sde_kms_info *info = NULL;
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u32 i, num_mixers;
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if (!drm_crtc) {
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DRM_ERROR("invalid crtc handle");
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return;
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}
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crtc = to_sde_crtc(drm_crtc);
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num_mixers = crtc->num_mixers;
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if (!num_mixers)
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return;
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mutex_lock(&crtc->crtc_cp_lock);
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info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
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if (info) {
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for (i = 0; i < ARRAY_SIZE(dspp_cap_update_func); i++)
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dspp_cap_update_func[i](crtc, info);
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msm_property_set_blob(&crtc->property_info,
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&crtc->dspp_blob_info,
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info->data, SDE_KMS_INFO_DATALEN(info),
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CRTC_PROP_DSPP_INFO);
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}
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kfree(info);
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mutex_unlock(&crtc->crtc_cp_lock);
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}
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void sde_cp_crtc_disable(struct drm_crtc *drm_crtc)
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{
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struct sde_kms_info *info = NULL;
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struct sde_crtc *crtc;
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if (!drm_crtc) {
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DRM_ERROR("invalid crtc handle");
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return;
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}
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crtc = to_sde_crtc(drm_crtc);
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mutex_lock(&crtc->crtc_cp_lock);
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info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
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if (info)
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msm_property_set_blob(&crtc->property_info,
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&crtc->dspp_blob_info,
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info->data, SDE_KMS_INFO_DATALEN(info),
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CRTC_PROP_DSPP_INFO);
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mutex_unlock(&crtc->crtc_cp_lock);
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kfree(info);
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}
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@@ -213,4 +213,17 @@ void sde_cp_crtc_res_change(struct drm_crtc *crtc_drm);
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*/
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void sde_cp_crtc_vm_primary_handoff(struct drm_crtc *crtc);
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/**
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* sde_cp_crtc_enable(): enable color processing info in the crtc.
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* Should be called during crtc enable.
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* @crtc: Pointer to drm_crtc.
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*/
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void sde_cp_crtc_enable(struct drm_crtc *crtc);
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/**
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* sde_cp_crtc_disable(): disable color processing info in the crtc.
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* Should be called during crtc disable.
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* @crtc: Pointer to drm_crtc.
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*/
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void sde_cp_crtc_disable(struct drm_crtc *crtc);
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#endif /*_SDE_COLOR_PROCESSING_H */
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@@ -4193,6 +4193,7 @@ static void sde_crtc_disable(struct drm_crtc *crtc)
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}
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_sde_crtc_reset(crtc);
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sde_cp_crtc_disable(crtc);
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mutex_unlock(&sde_crtc->crtc_lock);
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}
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@@ -4267,7 +4268,7 @@ static void sde_crtc_enable(struct drm_crtc *crtc,
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}
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sde_crtc->enabled = true;
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sde_cp_crtc_enable(crtc);
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/* update color processing on resume */
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event.type = DRM_EVENT_CRTC_POWER;
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event.length = sizeof(u32);
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@@ -288,6 +288,7 @@ struct sde_crtc_misr_info {
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* @target_bpp : target bpp used to calculate compression ratio
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* @static_cache_read_work: delayed worker to transition cache state to read
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* @cache_state : Current static image cache state
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* @dspp_blob_info : blob containing dspp hw capability information
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*/
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struct sde_crtc {
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struct drm_crtc base;
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@@ -374,6 +375,8 @@ struct sde_crtc {
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struct kthread_delayed_work static_cache_read_work;
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enum sde_crtc_cache_state cache_state;
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struct drm_property_blob *dspp_blob_info;
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};
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enum sde_crtc_dirty_flags {
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