ipa: adapt to IPAv5 number of pipes

IPAv5 supports up to 256 pipes, update code to support
increased number of pipes and change in bitmaps

Change-Id: I828bd274974fc0af96c90cdb0fcb339e523c7d08
Signed-off-by: Amir Levy <[email protected]>

drivers/platform/msm/ipa/ipa_v3/ipa.c

@@ -3908,7 +3908,7 @@ static int ipa3_q6_set_ex_path_to_apps(void)
 	/* Set the exception path to AP */
 	for (client_idx = 0; client_idx < IPA_CLIENT_MAX; client_idx++) {
 		ep_idx = ipa3_get_ep_mapping(client_idx);
-		if (ep_idx == -1 || (ep_idx >= IPA3_MAX_NUM_PIPES))
+		if (ep_idx == -1 || (ep_idx >= ipa3_get_max_num_pipes()))
 			continue;
 
 		/* disable statuses for all modem controlled prod pipes */
@@ -6225,9 +6225,9 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p,
 
 	ipa3_ctx->ipa_num_pipes = ipa3_get_num_pipes();
 	IPADBG("IPA Pipes num %u\n", ipa3_ctx->ipa_num_pipes);
-	if (ipa3_ctx->ipa_num_pipes > IPA3_MAX_NUM_PIPES) {
+	if (ipa3_ctx->ipa_num_pipes > IPA5_MAX_NUM_PIPES) {
 		IPAERR("IPA has more pipes then supported has %d, max %d\n",
-			ipa3_ctx->ipa_num_pipes, IPA3_MAX_NUM_PIPES);
+			ipa3_ctx->ipa_num_pipes, IPA5_MAX_NUM_PIPES);
 		result = -ENODEV;
 		goto fail_init_hw;
 	}
@@ -6293,7 +6293,7 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p,
 	 * entry will be returned from ipa3_get_hw_type_index()
 	 */
 	ipa_init_ep_flt_bitmap();
-	IPADBG("EP with flt support bitmap 0x%x (%u pipes)\n",
+	IPADBG("EP with flt support bitmap 0x%llx (%u pipes)\n",
 		ipa3_ctx->ep_flt_bitmap, ipa3_ctx->ep_flt_num);
 
 	/* Assign resource limitation to each group */

drivers/platform/msm/ipa/ipa_v3/ipa_client.c

@@ -988,7 +988,7 @@ static int ipa3_is_xdci_channel_empty(struct ipa3_ep_context *ep,
 }
 
 int ipa3_enable_force_clear(u32 request_id, bool throttle_source,
-	u32 source_pipe_bitmask)
+	u32 source_pipe_bitmask, u32 source_pipe_reg_idx)
 {
 	struct ipa_enable_force_clear_datapath_req_msg_v01 req;
 	int result;
@@ -1116,8 +1116,8 @@ static int ipa3_xdci_stop_gsi_ch_brute_force(u32 clnt_hdl,
 
 /* Clocks should be voted for before invoking this function */
 static int ipa3_stop_ul_chan_with_data_drain(u32 qmi_req_id,
-		u32 source_pipe_bitmask, bool should_force_clear, u32 clnt_hdl,
-		bool remove_delay)
+		u32 source_pipe_bitmask, u32 source_pipe_reg_idx,
+		bool should_force_clear, u32 clnt_hdl, bool remove_delay)
 {
 	int result;
 	bool is_empty = false;
@@ -1188,7 +1188,7 @@ static int ipa3_stop_ul_chan_with_data_drain(u32 qmi_req_id,
 	/* if still stop_in_proc or not empty, activate force clear */
 	if (should_force_clear) {
 		result = ipa3_enable_force_clear(qmi_req_id, false,
-			source_pipe_bitmask);
+			source_pipe_bitmask, source_pipe_reg_idx);
 		if (result) {
 			struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
 
@@ -1457,6 +1457,7 @@ int ipa3_xdci_disconnect(u32 clnt_hdl, bool should_force_clear, u32 qmi_req_id)
 	struct ipa3_ep_context *ep;
 	int result;
 	u32 source_pipe_bitmask = 0;
+	u32 source_pipe_reg_idx = 0;
 
 	IPADBG("entry\n");
 	if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
@@ -1475,11 +1476,11 @@ int ipa3_xdci_disconnect(u32 clnt_hdl, bool should_force_clear, u32 qmi_req_id)
 	if (!IPA_CLIENT_IS_CONS(ep->client)) {
 		IPADBG("Stopping PROD channel - hdl=%d clnt=%d\n",
 			clnt_hdl, ep->client);
-		source_pipe_bitmask = 1 <<
-			ipa3_get_ep_mapping(ep->client);
+		source_pipe_bitmask = ipahal_get_ep_bit(clnt_hdl);
+		source_pipe_reg_idx = ipahal_get_ep_reg_idx(clnt_hdl);
 		result = ipa3_stop_ul_chan_with_data_drain(qmi_req_id,
-			source_pipe_bitmask, should_force_clear, clnt_hdl,
-			true);
+			source_pipe_bitmask, source_pipe_reg_idx,
+			should_force_clear, clnt_hdl, true);
 		if (result) {
 			IPAERR("Fail to stop UL channel with data drain\n");
 			WARN_ON(1);
@@ -1562,6 +1563,7 @@ int ipa3_xdci_suspend(u32 ul_clnt_hdl, u32 dl_clnt_hdl,
 	struct ipa3_ep_context *dl_ep;
 	int result = -EFAULT;
 	u32 source_pipe_bitmask = 0;
+	u32 source_pipe_reg_idx = 0;
 	bool dl_data_pending = true;
 	bool ul_data_pending = true;
 	int i;
@@ -1684,10 +1686,11 @@ int ipa3_xdci_suspend(u32 ul_clnt_hdl, u32 dl_clnt_hdl,
 
 	/* STOP UL channel */
 	if (!is_dpl) {
-		source_pipe_bitmask = 1 << ipa3_get_ep_mapping(ul_ep->client);
+		source_pipe_bitmask = ipahal_get_ep_bit(ul_clnt_hdl);
+		source_pipe_reg_idx = ipahal_get_ep_reg_idx(ul_clnt_hdl);
 		result = ipa3_stop_ul_chan_with_data_drain(qmi_req_id,
-			source_pipe_bitmask, should_force_clear, ul_clnt_hdl,
-			false);
+			source_pipe_bitmask, source_pipe_reg_idx,
+			should_force_clear, ul_clnt_hdl, false);
 		if (result) {
 			IPAERR("Error stopping UL channel: result = %d\n",
 				result);

drivers/platform/msm/ipa/ipa_v3/ipa_flt.c

@@ -1166,7 +1166,7 @@ static int __ipa_add_ep_flt_rule(enum ipa_ip_type ip, enum ipa_client_type ep,
 	if (__ipa_add_flt_get_ep_idx(ep, &ipa_ep_idx))
 		return -EINVAL;
 
-	if (ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+	if (ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR_RL("invalid ipa_ep_idx=%d\n", ipa_ep_idx);
 		return -EINVAL;
 	}
@@ -1442,7 +1442,7 @@ int ipa3_add_flt_rule_after(struct ipa_ioc_add_flt_rule_after *rules)
 		goto bail;
 	}
 
-	if (ipa_ep_idx >= IPA3_MAX_NUM_PIPES || ipa_ep_idx < 0) {
+	if (ipa_ep_idx >= ipa3_get_max_num_pipes() || ipa_ep_idx < 0) {
 		IPAERR_RL("invalid ipa_ep_idx=%u\n", ipa_ep_idx);
 		result = -EINVAL;
 		goto bail;
@@ -1560,7 +1560,7 @@ int ipa3_add_flt_rule_after_v2(struct ipa_ioc_add_flt_rule_after_v2
 		goto bail;
 	}
 
-	if (ipa_ep_idx >= IPA3_MAX_NUM_PIPES ||
+	if (ipa_ep_idx >= ipa3_get_max_num_pipes() ||
 		ipa_ep_idx < 0) {
 		IPAERR_RL("invalid ipa_ep_idx=%u\n", ipa_ep_idx);
 		result = -EINVAL;
@@ -1892,7 +1892,7 @@ void ipa3_install_dflt_flt_rules(u32 ipa_ep_idx)
 	struct ipa3_ep_context *ep;
 	struct ipa_flt_rule_i rule;
 
-	if (ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+	if (ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("invalid ipa_ep_idx=%u\n", ipa_ep_idx);
 		ipa_assert();
 		return;
@@ -2039,7 +2039,7 @@ int ipa3_flt_read_tbl_from_hw(u32 pipe_idx, enum ipa_ip_type ip_type,
 	}
 
 	if (pipe_idx >= ipa3_ctx->ipa_num_pipes ||
-		pipe_idx >= IPA3_MAX_NUM_PIPES || ip_type >= IPA_IP_MAX ||
+		pipe_idx >= ipa3_get_max_num_pipes() || ip_type >= IPA_IP_MAX ||
 		!entry || !num_entry) {
 		IPAERR_RL("Invalid pipe_idx=%u\n", pipe_idx);
 		return -EFAULT;

drivers/platform/msm/ipa/ipa_v3/ipa_hw_stats.c

@@ -551,7 +551,7 @@ int ipa_get_quota_stats(struct ipa_quota_stats_all *out)
 	for (i = 0; i < IPA_CLIENT_MAX; i++) {
 		int ep_idx = ipa3_get_ep_mapping(i);
 
-		if (ep_idx == -1 || ep_idx >= IPA3_MAX_NUM_PIPES)
+		if (ep_idx == -1 || ep_idx >= ipa3_get_max_num_pipes())
 			continue;
 
 		if (ipa3_ctx->ep[ep_idx].client != i)
@@ -912,10 +912,12 @@ int ipa_get_teth_stats(void)
 			int prod_idx = ipa3_get_ep_mapping(i);
 			int cons_idx = ipa3_get_ep_mapping(j);
 
-			if (prod_idx == -1 || prod_idx >= IPA3_MAX_NUM_PIPES)
+			if (prod_idx == -1 ||
+				prod_idx >= ipa3_get_max_num_pipes())
 				continue;
 
-			if (cons_idx == -1 || cons_idx >= IPA3_MAX_NUM_PIPES)
+			if (cons_idx == -1 ||
+				cons_idx >= ipa3_get_max_num_pipes())
 				continue;
 
 			/* save hw-query result */
@@ -1804,7 +1806,7 @@ int ipa_get_drop_stats(struct ipa_drop_stats_all *out)
 	for (i = 0; i < IPA_CLIENT_MAX; i++) {
 		int ep_idx = ipa3_get_ep_mapping(i);
 
-		if (ep_idx == -1 || ep_idx >= IPA3_MAX_NUM_PIPES)
+		if (ep_idx == -1 || ep_idx >= ipa3_get_max_num_pipes())
 			continue;
 
 		if (ipa3_ctx->ep[ep_idx].client != i)

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

@@ -51,6 +51,9 @@
 
 #define IPA_EP_NOT_ALLOCATED (-1)
 #define IPA3_MAX_NUM_PIPES 31
+#define IPA5_PIPES_NUM 36
+#define IPA5_PIPE_REG_NUM 2
+#define IPA5_MAX_NUM_PIPES (IPA5_PIPES_NUM)
 #define IPA_SYS_DESC_FIFO_SZ 0x800
 #define IPA_SYS_TX_DATA_DESC_FIFO_SZ 0x1000
 #define IPA_COMMON_EVENT_RING_SIZE 0x7C00
@@ -1935,12 +1938,12 @@ struct ipa3_app_clock_vote {
  */
 struct ipa3_context {
 	struct ipa3_char_device_context cdev;
-	struct ipa3_ep_context ep[IPA3_MAX_NUM_PIPES];
-	bool skip_ep_cfg_shadow[IPA3_MAX_NUM_PIPES];
-	u32 ep_flt_bitmap;
+	struct ipa3_ep_context ep[IPA5_MAX_NUM_PIPES];
+	bool skip_ep_cfg_shadow[IPA5_MAX_NUM_PIPES];
+	u64 ep_flt_bitmap;
 	u32 ep_flt_num;
 	bool resume_on_connect[IPA_CLIENT_MAX];
-	struct ipa3_flt_tbl flt_tbl[IPA3_MAX_NUM_PIPES][IPA_IP_MAX];
+	struct ipa3_flt_tbl flt_tbl[IPA5_MAX_NUM_PIPES][IPA_IP_MAX];
 	struct idr flt_rule_ids[IPA_IP_MAX];
 	void __iomem *mmio;
 	u32 ipa_wrapper_base;
@@ -2035,7 +2038,7 @@ struct ipa3_context {
 	struct mutex q6_proxy_clk_vote_mutex;
 	u32 q6_proxy_clk_vote_cnt;
 	u32 ipa_num_pipes;
-	dma_addr_t pkt_init_imm[IPA3_MAX_NUM_PIPES];
+	dma_addr_t pkt_init_imm[IPA5_MAX_NUM_PIPES];
 	u32 pkt_init_imm_opcode;
 
 	struct ipa3_wlan_comm_memb wc_memb;
@@ -2059,7 +2062,7 @@ struct ipa3_context {
 	/* RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA */
 	bool ipa_client_apps_wan_cons_agg_gro;
 	/* M-release support to know client pipes */
-	struct ipa3cm_client_info ipacm_client[IPA3_MAX_NUM_PIPES];
+	struct ipa3cm_client_info ipacm_client[IPA5_MAX_NUM_PIPES];
 	bool tethered_flow_control;
 	bool ipa_initialization_complete;
 	struct list_head ipa_ready_cb_list;
@@ -2885,7 +2888,7 @@ bool ipa3_check_idr_if_freed(void *ptr);
 void *ipa3_id_find(u32 id);
 void ipa3_id_remove(u32 id);
 int ipa3_enable_force_clear(u32 request_id, bool throttle_source,
-	u32 source_pipe_bitmask);
+	u32 source_pipe_bitmask, u32 source_pipe_reg_idx);
 int ipa3_disable_force_clear(u32 request_id);
 
 int ipa3_cfg_ep_status(u32 clnt_hdl,
@@ -2999,6 +3002,7 @@ int ipa_set_flt_rt_stats(int index, struct ipa_flt_rt_stats stats);
 
 bool ipa_get_fnr_info(struct ipacm_fnr_info *fnr_info);
 
+u32 ipa3_get_max_num_pipes(void);
 u32 ipa3_get_num_pipes(void);
 struct ipa_smmu_cb_ctx *ipa3_get_smmu_ctx(enum ipa_smmu_cb_type);
 struct iommu_domain *ipa3_get_smmu_domain(void);

drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c

@@ -1662,7 +1662,6 @@ static enum mhip_status_type ipa_mpm_start_stop_mhip_chan(
 	struct ipa3_ep_context *ep;
 	bool is_start;
 	enum ipa_client_type ul_chan, dl_chan;
-	u32 source_pipe_bitmask = 0;
 	enum gsi_status gsi_res = GSI_STATUS_SUCCESS;
 	int result;
 
@@ -1778,8 +1777,6 @@ static enum mhip_status_type ipa_mpm_start_stop_mhip_chan(
 		}
 
 		if (mhip_chan == IPA_MPM_MHIP_CHAN_UL) {
-			source_pipe_bitmask = 1 <<
-				ipa3_get_ep_mapping(ep->client);
 			/* First Stop UL GSI channel before unvote PCIe clock */
 			result = ipa3_stop_gsi_channel(ipa_ep_idx);
 

drivers/platform/msm/ipa/ipa_v3/ipa_pm.c

@@ -39,11 +39,6 @@
 	IPA_PM_DBG_LOW("Client[%d] %s: %s\n", hdl, name, \
 		client_state_to_str[state])
 
-
-#if IPA_PM_MAX_CLIENTS > 32
-#error max client greater than 32 all bitmask types should be changed
-#endif
-
 /*
  * struct ipa_pm_exception_list - holds information about an exception
  * @pending: number of clients in exception that have not yet been adctivated
@@ -53,7 +48,7 @@
 struct ipa_pm_exception_list {
 	char clients[IPA_PM_MAX_EX_CL];
 	int pending;
-	u32 bitmask;
+	u32 bitmask[IPA5_PIPE_REG_NUM];
 	int threshold[IPA_PM_THRESHOLD_MAX];
 };
 
@@ -74,7 +69,7 @@ struct clk_scaling_db {
 	spinlock_t lock;
 	struct ipa_pm_exception_list exception_list[IPA_PM_EXCEPTION_MAX];
 	struct work_struct work;
-	u32 active_client_bitmask;
+	u32 active_client_bitmask[IPA5_PIPE_REG_NUM];
 	int threshold_size;
 	int exception_size;
 	int cur_vote;
@@ -164,7 +159,7 @@ struct ipa_pm_client {
  */
 struct ipa_pm_ctx {
 	struct ipa_pm_client *clients[IPA_PM_MAX_CLIENTS];
-	struct ipa_pm_client *clients_by_pipe[IPA3_MAX_NUM_PIPES];
+	struct ipa_pm_client *clients_by_pipe[IPA5_PIPES_NUM];
 	struct workqueue_struct *wq;
 	struct clk_scaling_db clk_scaling;
 	struct mutex client_mutex;
@@ -280,12 +275,14 @@ static int calculate_throughput(void)
 static void deactivate_client(u32 hdl)
 {
 	unsigned long flags;
+	int idx = ipahal_get_ep_reg_idx(hdl);
 
 	spin_lock_irqsave(&ipa_pm_ctx->clk_scaling.lock, flags);
-	ipa_pm_ctx->clk_scaling.active_client_bitmask &= ~(1 << hdl);
+	ipa_pm_ctx->clk_scaling.active_client_bitmask[idx] &=
+		~(ipahal_get_ep_bit(hdl));
 	spin_unlock_irqrestore(&ipa_pm_ctx->clk_scaling.lock, flags);
-	IPA_PM_DBG_LOW("active bitmask: %x\n",
-		ipa_pm_ctx->clk_scaling.active_client_bitmask);
+	IPA_PM_DBG_LOW("active bitmask (%d): %x\n",
+		idx, ipa_pm_ctx->clk_scaling.active_client_bitmask[idx]);
 }
 
 /**
@@ -296,12 +293,14 @@ static void deactivate_client(u32 hdl)
 static void activate_client(u32 hdl)
 {
 	unsigned long flags;
+	int idx = ipahal_get_ep_reg_idx(hdl);
 
 	spin_lock_irqsave(&ipa_pm_ctx->clk_scaling.lock, flags);
-	ipa_pm_ctx->clk_scaling.active_client_bitmask |= (1 << hdl);
+	ipa_pm_ctx->clk_scaling.active_client_bitmask[idx] |=
+		(ipahal_get_ep_bit(hdl));
 	spin_unlock_irqrestore(&ipa_pm_ctx->clk_scaling.lock, flags);
-	IPA_PM_DBG_LOW("active bitmask: %x\n",
-		ipa_pm_ctx->clk_scaling.active_client_bitmask);
+	IPA_PM_DBG_LOW("active bitmask (%d): %x\n",
+		idx, ipa_pm_ctx->clk_scaling.active_client_bitmask[idx]);
 }
 
 /**
@@ -321,8 +320,10 @@ static void set_current_threshold(void)
 	spin_lock_irqsave(&ipa_pm_ctx->clk_scaling.lock, flags);
 	for (i = 0; i < clk->exception_size; i++) {
 		exception = &clk->exception_list[i];
-		if (exception->pending == 0 && (exception->bitmask
-			& ~clk->active_client_bitmask) == 0) {
+		if (exception->pending == 0 && ((exception->bitmask[0]
+			& ~clk->active_client_bitmask[0]) == 0) &&
+			((exception->bitmask[1] &
+				~clk->active_client_bitmask[1]) == 0)) {
 			spin_unlock_irqrestore(&ipa_pm_ctx->clk_scaling.lock,
 				 flags);
 			clk->current_threshold = exception->threshold;
@@ -546,7 +547,8 @@ static int add_client_to_exception_list(u32 hdl)
 				mutex_unlock(&ipa_pm_ctx->client_mutex);
 				return -EPERM;
 			}
-			exception->bitmask |= (1 << hdl);
+			exception->bitmask[ipahal_get_ep_reg_idx(hdl)] |=
+				(ipahal_get_ep_bit(hdl));
 		}
 	}
 	IPA_PM_DBG("%s added to exception list\n",
@@ -567,14 +569,18 @@ static int remove_client_from_exception_list(u32 hdl)
 {
 	int i;
 	struct ipa_pm_exception_list *exception;
+	int idx;
+	u32 ep_bit;
 
+	idx = ipahal_get_ep_reg_idx(hdl);
+	ep_bit = ipahal_get_ep_bit(hdl);
 	for (i = 0; i < ipa_pm_ctx->clk_scaling.exception_size; i++) {
 		exception = &ipa_pm_ctx->clk_scaling.exception_list[i];
-		if (exception->bitmask & (1 << hdl)) {
+		if (exception->bitmask[idx] & (ep_bit)) {
 			exception->pending++;
 			IPA_PM_DBG("Pending: %d\n",
 			exception->pending);
-			exception->bitmask &= ~(1 << hdl);
+			exception->bitmask[idx] &= ~(ep_bit);
 		}
 	}
 	IPA_PM_DBG("Client %d removed from exception list\n", hdl);
@@ -823,7 +829,7 @@ int ipa_pm_deregister(u32 hdl)
 	mutex_lock(&ipa_pm_ctx->client_mutex);
 
 	/* nullify pointers in pipe array */
-	for (i = 0; i < IPA3_MAX_NUM_PIPES; i++) {
+	for (i = 0; i < ipa3_get_max_num_pipes(); i++) {
 		if (ipa_pm_ctx->clients_by_pipe[i] == ipa_pm_ctx->clients[hdl])
 			ipa_pm_ctx->clients_by_pipe[i] = NULL;
 	}
@@ -1224,7 +1230,7 @@ int ipa_pm_handle_suspend(u32 pipe_bitmask, u32 pipe_arr_idx)
 		return 0;
 
 	pipe_add = pipe_arr_idx * 32;
-	max_pipes = IPA3_MAX_NUM_PIPES;
+	max_pipes = ipa3_get_max_num_pipes();
 	mutex_lock(&ipa_pm_ctx->client_mutex);
 	for (i = 0; i < IPA_EP_PER_REG && (i + pipe_add) < max_pipes; i++) {
 		if (pipe_bitmask & (1 << i)) {
@@ -1370,7 +1376,7 @@ int ipa_pm_stat(char *buf, int size)
 			ipa_pm_group_to_str[client->group], tput);
 		cnt += result;
 
-		for (j = 0; j < IPA3_MAX_NUM_PIPES; j++) {
+		for (j = 0; j < ipa3_get_max_num_pipes(); j++) {
 			if (ipa_pm_ctx->clients_by_pipe[j] == client) {
 				result = scnprintf(buf + cnt, size - cnt,
 					"%d, ", j);
@@ -1418,9 +1424,9 @@ int ipa_pm_exceptions_stat(char *buf, int size)
 		}
 
 		result = scnprintf(buf + cnt, size - cnt,
-			"Exception %d: %s\nPending: %d Bitmask: %d Threshold: ["
+			"Exception %d: %s\nPending: %d Bitmask: %X %X Threshold: ["
 			, i, exception->clients, exception->pending,
-			exception->bitmask);
+			exception->bitmask[0], exception->bitmask[1]);
 		cnt += result;
 		for (j = 0; j < ipa_pm_ctx->clk_scaling.threshold_size; j++) {
 			result = scnprintf(buf + cnt, size - cnt,

drivers/platform/msm/ipa/ipa_v3/ipa_pm.h

@@ -9,7 +9,9 @@
 #include <linux/msm_ipa.h>
 
 /* internal to ipa */
-#define IPA_PM_MAX_CLIENTS 32 /* actual max is value -1 since we start from 1*/
+
+/* actual max is value -1 since we start from 1*/
+#define IPA_PM_MAX_CLIENTS IPA5_PIPES_NUM
 #define IPA_PM_MAX_EX_CL 64
 #define IPA_PM_THRESHOLD_MAX 5
 #define IPA_PM_EXCEPTION_MAX 5

drivers/platform/msm/ipa/ipa_v3/ipa_uc_ntn.c

@@ -400,7 +400,7 @@ int ipa3_setup_uc_ntn_pipes(struct ipa_ntn_conn_in_params *in,
 
 	ipa_ep_idx_ul = ipa_get_ep_mapping(in->ul.client);
 	if (ipa_ep_idx_ul == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx_ul >= IPA3_MAX_NUM_PIPES) {
+		ipa_ep_idx_ul >= ipa3_get_max_num_pipes()) {
 		IPAERR("fail to alloc UL EP ipa_ep_idx_ul=%d\n",
 			ipa_ep_idx_ul);
 		return -EFAULT;
@@ -408,7 +408,7 @@ int ipa3_setup_uc_ntn_pipes(struct ipa_ntn_conn_in_params *in,
 
 	ipa_ep_idx_dl = ipa_get_ep_mapping(in->dl.client);
 	if (ipa_ep_idx_dl == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx_dl >= IPA3_MAX_NUM_PIPES) {
+		ipa_ep_idx_dl >= ipa3_get_max_num_pipes()) {
 		IPAERR("fail to alloc DL EP ipa_ep_idx_dl=%d\n",
 			ipa_ep_idx_dl);
 		return -EFAULT;

drivers/platform/msm/ipa/ipa_v3/ipa_uc_wdi.c

@@ -2617,6 +2617,7 @@ int ipa3_suspend_gsi_wdi_pipe(u32 clnt_hdl)
 	struct ipa3_ep_context *ep;
 	int res = 0;
 	u32 source_pipe_bitmask = 0;
+	u32 source_pipe_reg_idx = 0;
 	bool disable_force_clear = false;
 	struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
 	int retry_cnt = 0;
@@ -2637,11 +2638,12 @@ int ipa3_suspend_gsi_wdi_pipe(u32 clnt_hdl)
 		return -EFAULT;
 	}
 	if (ep->valid) {
+		source_pipe_bitmask = ipahal_get_ep_bit(ipa_ep_idx);
+		source_pipe_reg_idx = ipahal_get_ep_reg_idx(ipa_ep_idx);
+
 		IPADBG("suspended pipe %d\n", ipa_ep_idx);
-		source_pipe_bitmask = 1 <<
-			ipa3_get_ep_mapping(ep->client);
 		res = ipa3_enable_force_clear(clnt_hdl,
-				false, source_pipe_bitmask);
+			false, source_pipe_bitmask, source_pipe_reg_idx);
 		if (res) {
 			/*
 			 * assuming here modem SSR, AP can remove
@@ -2731,6 +2733,7 @@ int ipa3_suspend_wdi_pipe(u32 clnt_hdl)
 	union IpaHwWdiCommonChCmdData_t suspend;
 	struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
 	u32 source_pipe_bitmask = 0;
+	u32 source_pipe_reg_idx = 0;
 	bool disable_force_clear = false;
 	struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
 
@@ -2765,10 +2768,10 @@ int ipa3_suspend_wdi_pipe(u32 clnt_hdl)
 		 * as IPA uC will fail to suspend the pipe otherwise.
 		 */
 		if (ipa3_ctx->ipa_wdi2) {
-			source_pipe_bitmask = 1 <<
-					ipa3_get_ep_mapping(ep->client);
+			source_pipe_bitmask = ipahal_get_ep_bit(clnt_hdl);
+			source_pipe_reg_idx = ipahal_get_ep_reg_idx(clnt_hdl);
 			result = ipa3_enable_force_clear(clnt_hdl,
-				false, source_pipe_bitmask);
+				false, source_pipe_bitmask,source_pipe_reg_idx);
 			if (result) {
 				/*
 				 * assuming here modem SSR, AP can remove

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

@@ -4871,7 +4871,7 @@ int ipa3_get_ep_mapping(enum ipa_client_type client)
 
 	ipa_ep_idx =
 		ipa3_ep_mapping[hw_idx][client].ipa_gsi_ep_info.ipa_ep_num;
-	if (ipa_ep_idx < 0 || (ipa_ep_idx >= IPA3_MAX_NUM_PIPES
+	if (ipa_ep_idx < 0 || (ipa_ep_idx >= ipa3_get_max_num_pipes()
 		&& client != IPA_CLIENT_DUMMY_CONS))
 		return IPA_EP_NOT_ALLOCATED;
 
@@ -4961,7 +4961,7 @@ void ipa3_set_client(int index, enum ipacm_client_enum client, bool uplink)
 {
 	if (client > IPACM_CLIENT_MAX || client < IPACM_CLIENT_USB) {
 		IPAERR("Bad client number! client =%d\n", client);
-	} else if (index >= IPA3_MAX_NUM_PIPES || index < 0) {
+	} else if (index >= ipa3_get_max_num_pipes() || index < 0) {
 		IPAERR("Bad pipe index! index =%d\n", index);
 	} else {
 		ipa3_ctx->ipacm_client[index].client_enum = client;
@@ -5028,7 +5028,7 @@ int ipa3_inform_wlan_bw(struct ipa_inform_wlan_bw *wdi_bw)
  */
 enum ipacm_client_enum ipa3_get_client(int pipe_idx)
 {
-	if (pipe_idx >= IPA3_MAX_NUM_PIPES || pipe_idx < 0) {
+	if (pipe_idx >= ipa3_get_max_num_pipes() || pipe_idx < 0) {
 		IPAERR("Bad pipe index! pipe_idx =%d\n", pipe_idx);
 		return IPACM_CLIENT_MAX;
 	} else {
@@ -5045,7 +5045,7 @@ EXPORT_SYMBOL(ipa3_get_client);
  */
 bool ipa3_get_client_uplink(int pipe_idx)
 {
-	if (pipe_idx < 0 || pipe_idx >= IPA3_MAX_NUM_PIPES) {
+	if (pipe_idx < 0 || pipe_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("invalid pipe idx %d\n", pipe_idx);
 		return false;
 	}
@@ -5109,7 +5109,7 @@ void ipa_init_ep_flt_bitmap(void)
 {
 	enum ipa_client_type cl;
 	u8 hw_idx;
-	u32 bitmap;
+	u64 bitmap;
 	u32 pipe_num;
 	const struct ipa_gsi_ep_config *gsi_ep_ptr;
 
@@ -7646,6 +7646,20 @@ enum ipa_transport_type ipa3_get_transport_type(void)
 }
 EXPORT_SYMBOL(ipa3_get_transport_type);
 
+/**
+ * ipa3_get_max_num_pipes()
+ *
+ * Return value: maximal possible pipes num per hw_ver (not necessarily the
+ *	actual pipes num)
+ */
+u32 ipa3_get_max_num_pipes(void)
+{
+	if (ipa3_ctx->ipa_hw_type >= IPA_HW_v5_0)
+		return IPA5_PIPES_NUM;
+	else
+		return IPA3_MAX_NUM_PIPES;
+}
+
 u32 ipa3_get_num_pipes(void)
 {
 	if (ipa3_ctx->ipa_hw_type >= IPA_HW_v5_0) {

drivers/platform/msm/ipa/ipa_v3/ipa_wdi3_i.c

@@ -488,8 +488,8 @@ int ipa3_conn_wdi3_pipes(struct ipa_wdi_conn_in_params *in,
 		IPAERR("fail to alloc EP.\n");
 		return -EFAULT;
 	}
-	if (ipa_ep_idx_rx >= IPA3_MAX_NUM_PIPES ||
-		ipa_ep_idx_tx >= IPA3_MAX_NUM_PIPES) {
+	if (ipa_ep_idx_rx >= ipa3_get_max_num_pipes() ||
+		ipa_ep_idx_tx >= ipa3_get_max_num_pipes()) {
 		IPAERR("ep out of range.\n");
 		return -EFAULT;
 	}
@@ -680,8 +680,9 @@ int ipa3_disconn_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx)
 	IPADBG("ep_tx = %d\n", ipa_ep_idx_tx);
 	IPADBG("ep_rx = %d\n", ipa_ep_idx_rx);
 
-	if (ipa_ep_idx_tx < 0 || ipa_ep_idx_tx >= IPA3_MAX_NUM_PIPES ||
-		ipa_ep_idx_rx < 0 || ipa_ep_idx_rx >= IPA3_MAX_NUM_PIPES) {
+	if (ipa_ep_idx_tx < 0 || ipa_ep_idx_tx >= ipa3_get_max_num_pipes() ||
+		ipa_ep_idx_rx < 0 ||
+		ipa_ep_idx_rx >= ipa3_get_max_num_pipes()) {
 		IPAERR("invalid ipa ep index\n");
 		return -EINVAL;
 	}
@@ -843,6 +844,7 @@ int ipa3_disable_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx)
 	int result = 0;
 	struct ipa3_ep_context *ep;
 	u32 source_pipe_bitmask = 0;
+	u32 source_pipe_reg_idx = 0;
 	bool disable_force_clear = false;
 	struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
 
@@ -877,10 +879,10 @@ int ipa3_disable_wdi3_pipes(int ipa_ep_idx_tx, int ipa_ep_idx_rx)
 	 * as IPA uC will fail to suspend the pipe otherwise.
 	 */
 	ep = &ipa3_ctx->ep[ipa_ep_idx_rx];
-	source_pipe_bitmask = 1 <<
-			ipa3_get_ep_mapping(ep->client);
+	source_pipe_bitmask = ipahal_get_ep_bit(ipa_ep_idx_rx);
+	source_pipe_reg_idx = ipahal_get_ep_reg_idx(ipa_ep_idx_rx);
 	result = ipa3_enable_force_clear(ipa_ep_idx_rx,
-			false, source_pipe_bitmask);
+			false, source_pipe_bitmask, source_pipe_reg_idx);
 	if (result) {
 		/*
 		 * assuming here modem SSR, AP can remove

drivers/platform/msm/ipa/ipa_v3/ipa_wigig_i.c

@@ -959,7 +959,7 @@ int ipa3_conn_wigig_rx_pipe_i(void *in, struct ipa_wigig_conn_out_params *out,
 
 	ipa_ep_idx = ipa_get_ep_mapping(rx_client);
 	if (ipa_ep_idx == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+		ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("fail to get ep (IPA_CLIENT_WIGIG_PROD) %d.\n",
 			ipa_ep_idx);
 		return -EFAULT;
@@ -1253,7 +1253,7 @@ int ipa3_conn_wigig_client_i(void *in,
 
 	ipa_ep_idx = ipa_get_ep_mapping(tx_client);
 	if (ipa_ep_idx == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+		ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("fail to get ep (%d) %d.\n",
 			tx_client, ipa_ep_idx);
 		return -EFAULT;
@@ -1393,7 +1393,7 @@ int ipa3_disconn_wigig_pipe_i(enum ipa_client_type client,
 
 	ipa_ep_idx = ipa_get_ep_mapping(client);
 	if (ipa_ep_idx == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+		ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("fail to get ep (%d) %d.\n",
 			client, ipa_ep_idx);
 		return -EFAULT;
@@ -1661,7 +1661,7 @@ int ipa3_enable_wigig_pipe_i(enum ipa_client_type client)
 
 	ipa_ep_idx = ipa_get_ep_mapping(client);
 	if (ipa_ep_idx == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+		ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("fail to get ep (%d) %d.\n",
 			client, ipa_ep_idx);
 		return -EFAULT;
@@ -1778,18 +1778,18 @@ int ipa3_disable_wigig_pipe_i(enum ipa_client_type client)
 	struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
 	bool disable_force_clear = false;
 	u32 source_pipe_bitmask = 0;
+	u32 source_pipe_reg_idx = 0;
 	int retry_cnt = 0;
 
 	IPADBG("\n");
 
 	ipa_ep_idx = ipa_get_ep_mapping(client);
-	if (ipa_ep_idx == IPA_EP_NOT_ALLOCATED ||
-		ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+	if (ipa_ep_idx == IPA_EP_NOT_ALLOCATED) {
 		IPAERR("fail to get ep (%d) %d.\n",
 			client, ipa_ep_idx);
 		return -EFAULT;
 	}
-	if (ipa_ep_idx >= IPA3_MAX_NUM_PIPES) {
+	if (ipa_ep_idx >= ipa3_get_max_num_pipes()) {
 		IPAERR("ep %d out of range.\n", ipa_ep_idx);
 		return -EFAULT;
 	}
@@ -1809,9 +1809,10 @@ int ipa3_disable_wigig_pipe_i(enum ipa_client_type client)
 	}
 
 	IPADBG("pipe %d\n", ipa_ep_idx);
-	source_pipe_bitmask = 1 << ipa_ep_idx;
+	source_pipe_bitmask = ipahal_get_ep_bit(ipa_ep_idx);
+	source_pipe_reg_idx = ipahal_get_ep_reg_idx(ipa_ep_idx);
 	res = ipa3_enable_force_clear(ipa_ep_idx,
-		false, source_pipe_bitmask);
+		false, source_pipe_bitmask, source_pipe_reg_idx);
 	if (res) {
 		/*
 		 * assuming here modem SSR, AP can remove