Merge "disp: msm: check max FPS of DFPS to update UIDLE configurations"
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@@ -456,6 +456,28 @@ static bool dsi_bridge_mode_fixup(struct drm_bridge *bridge,
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return true;
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}
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u32 dsi_drm_get_dfps_maxfps(void *display)
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{
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u32 dfps_maxfps = 0;
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struct dsi_display *dsi_display = display;
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/*
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* The time of SDE transmitting one frame active data
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* will not be changed, if frame rate is adjusted with
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* VFP method.
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* So only return max fps of DFPS for UIDLE update, if DFPS
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* is enabled with VFP.
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*/
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if (dsi_display && dsi_display->panel &&
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dsi_display->panel->panel_mode == DSI_OP_VIDEO_MODE &&
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dsi_display->panel->dfps_caps.type ==
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DSI_DFPS_IMMEDIATE_VFP)
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dfps_maxfps =
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dsi_display->panel->dfps_caps.max_refresh_rate;
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return dfps_maxfps;
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}
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u64 dsi_drm_find_bit_clk_rate(void *display,
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const struct drm_display_mode *drm_mode)
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{
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@@ -509,6 +531,7 @@ int dsi_conn_get_mode_info(struct drm_connector *connector,
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mode_info->jitter_numer = dsi_mode.priv_info->panel_jitter_numer;
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mode_info->jitter_denom = dsi_mode.priv_info->panel_jitter_denom;
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mode_info->clk_rate = dsi_drm_find_bit_clk_rate(display, drm_mode);
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mode_info->dfps_maxfps = dsi_drm_get_dfps_maxfps(display);
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mode_info->mdp_transfer_time_us =
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dsi_mode.priv_info->mdp_transfer_time_us;
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@@ -675,6 +675,7 @@ struct msm_display_topology {
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* @jitter_numer: display panel jitter numerator configuration
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* @jitter_denom: display panel jitter denominator configuration
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* @clk_rate: DSI bit clock per lane in HZ.
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* @dfps_maxfps: max FPS of dynamic FPS
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* @topology: supported topology for the mode
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* @comp_info: compression info supported
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* @roi_caps: panel roi capabilities
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@@ -690,6 +691,7 @@ struct msm_mode_info {
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uint32_t jitter_numer;
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uint32_t jitter_denom;
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uint64_t clk_rate;
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uint32_t dfps_maxfps;
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struct msm_display_topology topology;
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struct msm_compression_info comp_info;
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struct msm_roi_caps roi_caps;
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@@ -603,7 +603,16 @@ void sde_core_perf_crtc_update_uidle(struct drm_crtc *crtc,
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drm_for_each_crtc(tmp_crtc, crtc->dev) {
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if (_sde_core_perf_crtc_is_power_on(tmp_crtc)) {
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fps = sde_crtc_get_fps_mode(tmp_crtc);
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/*
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* If DFPS is enabled with VFP, SDE clock and
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* transfer time will get fixed at max FPS
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* configuration of DFPS.
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* So get the max FPS of DFPS firstly for
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* UIDLE update, if DFPS is enabled with VFP.
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*/
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fps = sde_crtc_get_dfps_maxfps(tmp_crtc);
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if (!fps)
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fps = sde_crtc_get_fps_mode(tmp_crtc);
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SDE_DEBUG("crtc=%d fps:%d wb:%d cwb:%d dis:%d en:%d\n",
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tmp_crtc->base.id, fps,
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@@ -2375,6 +2375,24 @@ u32 sde_crtc_get_fps_mode(struct drm_crtc *crtc)
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return 0;
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}
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u32 sde_crtc_get_dfps_maxfps(struct drm_crtc *crtc)
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{
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struct drm_encoder *encoder;
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if (!crtc || !crtc->dev) {
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SDE_ERROR("invalid crtc\n");
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return 0;
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}
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drm_for_each_encoder_mask(encoder, crtc->dev,
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crtc->state->encoder_mask) {
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if (!sde_encoder_in_cont_splash(encoder))
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return sde_encoder_get_dfps_maxfps(encoder);
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}
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return 0;
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}
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static void sde_crtc_vblank_cb(void *data)
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{
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struct drm_crtc *crtc = (struct drm_crtc *)data;
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@@ -652,6 +652,12 @@ enum sde_intf_mode sde_crtc_get_intf_mode(struct drm_crtc *crtc,
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*/
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u32 sde_crtc_get_fps_mode(struct drm_crtc *crtc);
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/**
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* sde_crtc_get_dfps_maxfps - get DFPS max fps of the given crtc
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* @crtc: Pointert to crtc
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*/
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u32 sde_crtc_get_dfps_maxfps(struct drm_crtc *crtc);
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/**
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* sde_crtc_get_client_type - check the crtc type- rt, rsc_rt, etc.
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* @crtc: Pointer to crtc
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@@ -545,6 +545,25 @@ void sde_encoder_uidle_enable(struct drm_encoder *drm_enc, bool enable);
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*/
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void sde_encoder_irq_control(struct drm_encoder *drm_enc, bool enable);
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/*
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* sde_encoder_get_dfps_maxfps - get dynamic FPS max frame rate of
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the given encoder
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* @encoder: Pointer to drm encoder object
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*/
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static inline u32 sde_encoder_get_dfps_maxfps(struct drm_encoder *drm_enc)
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{
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struct sde_encoder_virt *sde_enc;
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if (!drm_enc) {
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SDE_ERROR("invalid encoder\n");
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return 0;
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}
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sde_enc = to_sde_encoder_virt(drm_enc);
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return sde_enc->mode_info.dfps_maxfps;
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}
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/**
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* sde_encoder_get_kms - retrieve the kms from encoder
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* @drm_enc: Pointer to drm encoder structure
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