Merge "disp: msm: dsi: fix mutiplier frac_bits assignment"
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@@ -711,8 +711,17 @@ static unsigned long dsi_pll_vco_recalc_rate(struct dsi_pll_resource *pll)
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u32 pll_post_div;
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u32 pll_post_div;
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u64 pll_freq, tmp64;
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u64 pll_freq, tmp64;
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u64 vco_rate;
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u64 vco_rate;
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struct dsi_pll_5nm *pll_5nm;
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struct dsi_pll_config *config;
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ref_clk = pll->vco_ref_clk_rate;
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ref_clk = pll->vco_ref_clk_rate;
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pll_5nm = pll->priv;
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if (!pll_5nm) {
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DSI_PLL_ERR(pll, "pll configuration not found\n");
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return -EINVAL;
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}
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config = &pll_5nm->pll_configuration;
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dec = DSI_PLL_REG_R(pll->pll_base, PLL_DECIMAL_DIV_START_1);
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dec = DSI_PLL_REG_R(pll->pll_base, PLL_DECIMAL_DIV_START_1);
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dec &= 0xFF;
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dec &= 0xFF;
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@@ -723,7 +732,7 @@ static unsigned long dsi_pll_vco_recalc_rate(struct dsi_pll_resource *pll)
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frac |= ((DSI_PLL_REG_R(pll->pll_base, PLL_FRAC_DIV_START_HIGH_1) & 0x3)
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frac |= ((DSI_PLL_REG_R(pll->pll_base, PLL_FRAC_DIV_START_HIGH_1) & 0x3)
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<< 16);
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<< 16);
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multiplier = 1 << 18;
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multiplier = 1 << config->frac_bits;
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pll_freq = dec * (ref_clk * 2);
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pll_freq = dec * (ref_clk * 2);
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tmp64 = (ref_clk * 2 * frac);
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tmp64 = (ref_clk * 2 * frac);
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pll_freq += div_u64(tmp64, multiplier);
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pll_freq += div_u64(tmp64, multiplier);
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