qcacmn: Fix REO reinjection path in hamilton DP

Add HAL APIs to fix REO reinjection path in hamilton DP

Change-Id: I73c6ec0aeb2f6d4bc72b366e22e9bc826f852426
CRs-Fixed: 3058549
这个提交包含在:
Ananya Gupta
2021-10-19 12:45:16 +05:30
提交者 Madan Koyyalamudi
父节点 6d6881fff4
当前提交 122bc19864
修改 8 个文件,包含 123 行新增8 行删除

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@@ -697,6 +697,50 @@ static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf)
return mic_err;
}
/**
* hal_get_reo_ent_desc_qdesc_addr_be(): API to get qdesc address of reo
* entrance ring desc
*
* @desc: reo entrance ring descriptor
* Return: qdesc adrress
*/
static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
{
return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
}
/**
* hal_rx_get_qdesc_addr_be(): API to get qdesc address of reo
* entrance ring desc
*
* @dst_ring_desc: reo dest ring descriptor (used for Lithium DP)
* @buf: pointer to the start of RX PKT TLV headers
* Return: qdesc adrress in reo destination ring buffer
*/
static inline uint8_t *hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
uint8_t *buf)
{
struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
return (uint8_t *)(&HAL_RX_MPDU_START(rx_pkt_tlvs) +
RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET);
}
/**
* hal_set_reo_ent_desc_reo_dest_ind_be(): API to set reo destination
* indication of reo entrance ring desc
*
* @desc: reo ent ring descriptor
* @dst_ind: reo destination indication value
* Return: None
*/
static inline void
hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind)
{
HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING,
REO_DESTINATION_INDICATION, dst_ind);
}
/**
* hal_rx_mpdu_sequence_number_get() - Get mpdu sequence number
* @buf: pointer to packet buffer

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@@ -991,6 +991,11 @@ struct hal_hw_txrx_ops {
void (*hal_rx_tlv_msdu_len_set)(uint8_t *buf, uint32_t len);
void (*hal_rx_tlv_populate_mpdu_desc_info)(uint8_t *buf,
void *mpdu_desc_info_hdl);
uint8_t *(*hal_get_reo_ent_desc_qdesc_addr)(uint8_t *desc);
uint8_t *(*hal_rx_get_qdesc_addr)(uint8_t *dst_ring_desc,
uint8_t *buf);
void (*hal_set_reo_ent_desc_reo_dest_ind)(uint8_t *desc,
uint32_t dst_ind);
/* REO CMD and STATUS */
int (*hal_reo_send_cmd)(hal_soc_handle_t hal_soc_hdl,

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@@ -2555,6 +2555,39 @@ hal_rx_tlv_get_pn_num(hal_soc_handle_t hal_soc_hdl,
hal_soc->ops->hal_rx_tlv_get_pn_num(buf, pn_num);
}
static inline uint8_t *
hal_get_reo_ent_desc_qdesc_addr(hal_soc_handle_t hal_soc_hdl, uint8_t *desc)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr)
return hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr(desc);
return NULL;
}
static inline uint8_t *
hal_rx_get_qdesc_addr(hal_soc_handle_t hal_soc_hdl, uint8_t *dst_ring_desc,
uint8_t *buf)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (hal_soc->ops->hal_rx_get_qdesc_addr)
return hal_soc->ops->hal_rx_get_qdesc_addr(dst_ring_desc, buf);
return NULL;
}
static inline void
hal_set_reo_ent_desc_reo_dest_ind(hal_soc_handle_t hal_soc_hdl,
uint8_t *desc, uint32_t dst_ind)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind)
hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind(desc, dst_ind);
}
static inline uint32_t
hal_rx_tlv_get_is_decrypted(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
{

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@@ -1055,6 +1055,19 @@ hal_msdu_desc_info_set_li(hal_soc_handle_t hal_soc_hdl,
DA_IS_VALID, 1);
}
static inline
uint8_t *hal_get_reo_ent_desc_qdesc_addr_li(uint8_t *desc)
{
return desc + REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
}
static inline
void hal_set_reo_ent_desc_reo_dest_ind_li(uint8_t *desc, uint32_t dst_ind)
{
HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING_5,
REO_DESTINATION_INDICATION, dst_ind);
}
static QDF_STATUS hal_reo_status_update_li(hal_soc_handle_t hal_soc_hdl,
hal_ring_desc_t reo_desc,
void *st_handle,
@@ -1211,4 +1224,9 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_li;
hal_soc->ops->hal_reo_status_update = hal_reo_status_update_li;
hal_soc->ops->hal_get_tlv_hdr_size = hal_get_tlv_hdr_size_li;
hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr =
hal_get_reo_ent_desc_qdesc_addr_li;
hal_soc->ops->hal_rx_get_qdesc_addr = hal_rx_get_qdesc_addr_li;
hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
hal_set_reo_ent_desc_reo_dest_ind_li;
}

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@@ -1354,3 +1354,9 @@ uint8_t hal_get_tlv_hdr_size_li(void)
{
return sizeof(struct tlv_32_hdr);
}
uint8_t *hal_rx_get_qdesc_addr_li(uint8_t *dst_ring_desc, uint8_t *buf)
{
return dst_ring_desc +
REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
}

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@@ -76,4 +76,6 @@ void hal_reo_init_cmd_ring_li(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl);
uint8_t hal_get_tlv_hdr_size_li(void);
uint8_t *hal_rx_get_qdesc_addr_li(uint8_t *dst_ring_desc, uint8_t *buf);
#endif /* _HAL_LI_REO_H_ */

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@@ -1514,6 +1514,12 @@ static void hal_hw_txrx_ops_attach_wcn7850(struct hal_soc *hal_soc)
hal_rx_tlv_populate_mpdu_desc_info_7850;
hal_soc->ops->hal_rx_tlv_get_pn_num =
hal_rx_tlv_get_pn_num_be;
hal_soc->ops->hal_get_reo_ent_desc_qdesc_addr =
hal_get_reo_ent_desc_qdesc_addr_be;
hal_soc->ops->hal_rx_get_qdesc_addr =
hal_rx_get_qdesc_addr_be;
hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
hal_set_reo_ent_desc_reo_dest_ind_be;
};
struct hal_hw_srng_config hw_srng_table_7850[] = {