msm: camera: tfe: Fixes for CSIM issues

This change adds fixes for all tfe issues faced during CSIM
validation. Adds required shift values in TFE header files.
Correct format for pdaf ports.

CRs-Fixed: 3426117
Change-Id: I3bf9c44e1ce108aa6247fea867d2b5161705b6bb
Signed-off-by: Ayush Kumar <[email protected]>

drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.c

@@ -1728,13 +1728,14 @@ static int cam_tfe_mgr_acquire_hw_for_ctx(
 	cam_tfe_hw_mgr_preprocess_port(tfe_ctx, in_port, &ipp_count,
 		&rdi_count, &ppp_count, pdaf_enable, &lcr_enable);
 
-	if (!ipp_count && !rdi_count && !ppp_count) {
+	if ((!ipp_count && !rdi_count && !ppp_count) || (!ipp_count && ppp_count)) {
 		CAM_ERR(CAM_ISP,
-			"No PIX or RDI");
+			"Invalid path count : Ipp %d ppp %d rdi %d",
+			ipp_count, ppp_count, rdi_count);
 		return -EINVAL;
 	}
 
-	if (ipp_count || lcr_enable) {
+	if (ipp_count) {
 		/* get tfe csid IPP resource */
 		rc = cam_tfe_hw_mgr_acquire_res_tfe_csid_pxl(tfe_ctx,
 			in_port, true, crop_enable);
@@ -1746,7 +1747,7 @@ static int cam_tfe_mgr_acquire_hw_for_ctx(
 		}
 	}
 
-	if (ppp_count) {
+	if (ppp_count || lcr_enable) {
 		/* get ife csid PPP resource */
 		/* If both IPP and PPP paths are requested with the same vc dt
 		 * it is implied that the sensor is a type 3 PD sensor. Crop

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe770.h

@@ -70,6 +70,31 @@ static struct cam_tfe_top_reg_offset_common  tfe770_top_commong_reg  = {
 	.diag_neq_hbi_shift                     = 14,
 	.diag_sensor_hbi_mask                   = 0x3FFF,
 	.serializer_supported                   = true,
+	.pp_camif_violation_bit                 = BIT(0),
+	.pp_violation_bit                       = BIT(1),
+	.rdi0_camif_violation_bit               = BIT(2),
+	.rdi1_camif_violation_bit               = BIT(3),
+	.rdi2_camif_violation_bit               = BIT(4),
+	.diag_violation_bit                     = BIT(5),
+	.ppp_camif_violation_bit                = BIT(6),
+	.ppp_violation_bit                      = BIT(7),
+	.lcr_pd_timing_protocol_violation_bit   = BIT(8),
+	.dyamanic_switch_violation_bit          = BIT(9),
+	.pp_frame_drop_bit                      = BIT(8),
+	.rdi0_frame_drop_bit                    = BIT(9),
+	.rdi1_frame_drop_bit                    = BIT(10),
+	.rdi2_frame_drop_bit                    = BIT(11),
+	.ppp_frame_drop_bit                     = BIT(12),
+	.pp_overflow_bit                        = BIT(16),
+	.rdi0_overflow_bit                      = BIT(17),
+	.rdi1_overflow_bit                      = BIT(18),
+	.rdi2_overflow_bit                      = BIT(19),
+	.ppp_overflow_bit                       = BIT(20),
+	.out_of_sync_frame_drop_bit             = BIT(21),
+	.mup_shift_val                          = 8,
+	.mup_supported                          = true,
+	.height_shift                           = 16,
+	.epoch_shift_val                        = 16,
 };
 
 static struct cam_tfe_camif_reg  tfe770_camif_reg = {
@@ -1200,7 +1225,7 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 			.max_height       = -1,
 			.composite_group  = CAM_TFE_BUS_COMP_GRP_5,
 			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_1,
-			.mid[0]              = 4,
+			.mid[0]              = 16,
 		},
 		{
 			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RDI1,
@@ -1208,7 +1233,7 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 			.max_height       = -1,
 			.composite_group  = CAM_TFE_BUS_COMP_GRP_6,
 			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_2,
-			.mid[0]              = 5,
+			.mid[0]              = 17,
 		},
 		{
 			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_RDI2,
@@ -1216,7 +1241,7 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 			.max_height       = -1,
 			.composite_group  = CAM_TFE_BUS_COMP_GRP_7,
 			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_3,
-			.mid[0]              = 6,
+			.mid[0]              = 18,
 		},
 		{
 			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_FULL,
@@ -1232,7 +1257,7 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 			.max_height       = 4096,
 			.composite_group  = CAM_TFE_BUS_COMP_GRP_1,
 			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
-			.mid[0]              = 7,
+			.mid[0]              = 19,
 		},
 		{
 			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_PDAF,
@@ -1248,7 +1273,7 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 			.max_height       = -1,
 			.composite_group  = CAM_TFE_BUS_COMP_GRP_3,
 			.rup_group_id     = CAM_TFE_BUS_RUP_GRP_0,
-			.mid[0]              = 21,
+			.mid[0]              = 20,
 		},
 		{
 			.tfe_out_id       = CAM_TFE_BUS_TFE_OUT_STATS_HDR_BHIST,
@@ -1344,7 +1369,7 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 	.max_wm_per_comp_grp      = 3,
 	.comp_done_shift          = 8,
 	.top_bus_wr_irq_shift     = 1,
-	.comp_buf_done_mask = 0x7FF00,
+	.comp_buf_done_mask = 0xFFF00,
 	.comp_rup_done_mask = 0xF,
 	.bus_irq_error_mask = {
 		0xD0000000,
@@ -1353,6 +1378,8 @@ static struct cam_tfe_bus_hw_info  tfe770_bus_hw_info = {
 	.support_consumed_addr = true,
 	.pdaf_rdi2_mux_en = false,
 	.rdi_width = 128,
+	.en_cfg_shift = 16,
+	.height_shift = 16,
 };
 
 struct cam_tfe_hw_info cam_tfe770 = {

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.c

@@ -366,7 +366,7 @@ static int cam_tfe_bus_get_num_wm(
 	case CAM_TFE_BUS_TFE_OUT_PD_PREPROCESSED:
 	case CAM_TFE_BUS_TFE_OUT_PD_PARSED:
 		switch (format) {
-		case CAM_FORMAT_PLAIN16_16:
+		case CAM_FORMAT_PLAIN16_10:
 		case CAM_FORMAT_PLAIN64:
 			return 1;
 		default:
@@ -919,12 +919,11 @@ static int cam_tfe_bus_acquire_wm(
 	} else if (rsrc_data->index == 16) {
 		/* LCR */
 		switch (rsrc_data->format) {
-		case CAM_FORMAT_PLAIN16_16:
-			rsrc_data->stride = ALIGNUP(rsrc_data->width * 2, 8);
+		case CAM_FORMAT_PLAIN64:
+			rsrc_data->width = 0;
+			rsrc_data->height = 0;
+			rsrc_data->stride = 1;
 			rsrc_data->en_cfg = 0x1;
-			/* LSB aligned */
-			rsrc_data->pack_fmt |= (1 <<
-				bus_priv->common_data.pack_align_shift);
 			break;
 		default:
 			CAM_ERR(CAM_ISP, "Invalid format %d out_type:%d index: %d",
@@ -934,7 +933,7 @@ static int cam_tfe_bus_acquire_wm(
 	} else if (rsrc_data->index == 17) {
 		/* PD_PREPROCESSED */
 		switch (rsrc_data->format) {
-		case CAM_FORMAT_PLAIN16_16:
+		case CAM_FORMAT_PLAIN16_10:
 			rsrc_data->stride = ALIGNUP(rsrc_data->width * 2, 8);
 			rsrc_data->en_cfg = 0x1;
 			break;
@@ -946,7 +945,7 @@ static int cam_tfe_bus_acquire_wm(
 	} else if (rsrc_data->index == 18) {
 		/* PD PARSED */
 		switch (rsrc_data->format) {
-		case CAM_FORMAT_PLAIN16_16:
+		case CAM_FORMAT_PLAIN16_10:
 			rsrc_data->stride = ALIGNUP(rsrc_data->width * 2, 8);
 			rsrc_data->en_cfg = 0x1;
 			/* LSB aligned */

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.c

@@ -507,6 +507,10 @@ static void cam_tfe_log_error_irq_status(
 		if (evt_payload->irq_reg_val[2] & common_reg->ppp_violation_bit)
 			CAM_INFO(CAM_ISP, "TFE %d PDAF_VIOLATION", core_info->core_index);
 
+		if (evt_payload->irq_reg_val[2] & common_reg->lcr_pd_timing_protocol_violation_bit)
+			CAM_INFO(CAM_ISP, "TFE %d LCR_PD_INPUT_TIMING_PROTOCOL_VIOLATION",
+				core_info->core_index);
+
 		if (evt_payload->irq_reg_val[2] & common_reg->dyamanic_switch_violation_bit)
 			CAM_INFO(CAM_ISP,
 				"TFE %d DYNAMIC_SHDR_MODE_SWITCH_VIOLATION mup val %d",
@@ -1521,6 +1525,7 @@ static int cam_tfe_top_get_reg_update(
 		/*REG CMD is not supported in PDLIB. PD CAMIF takes RUP from IPP CAMIF */
 		CAM_DBG(CAM_ISP, "Reg update not supported for res %d",
 			in_res->res_id);
+		cdm_args->cmd.used_bytes = 0;
 		return 0;
 	}
 

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_core.h

@@ -135,6 +135,7 @@ struct cam_tfe_top_reg_offset_common {
 	uint32_t rdi1_overflow_bit;
 	uint32_t rdi2_overflow_bit;
 	uint32_t out_of_sync_frame_drop_bit;
+	uint32_t lcr_pd_timing_protocol_violation_bit;
 	uint32_t height_shift;
 	uint32_t epoch_shift_val;
 

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_lite770.h

@@ -501,7 +501,7 @@ static struct cam_tfe_bus_hw_info  tfe_lite770_bus_hw_info = {
 	.max_wm_per_comp_grp      = 3,
 	.comp_done_shift          = 8,
 	.top_bus_wr_irq_shift     = 1,
-	.comp_buf_done_mask = 0x7FF00,
+	.comp_buf_done_mask = 0xE000,
 	.comp_rup_done_mask = 0xF,
 	.bus_irq_error_mask = {
 		0xD0000000,