soc: soundwire: Add support for PCM data type

Add support to enable PCM data transfer through soundwire interface.

Change-Id: I9b162beb7fcdc6bbb90303acb77c350dbcf8c490
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
This commit is contained in:
Sudheer Papothi
2019-10-26 00:20:42 +05:30
committed by Gerrit - the friendly Code Review server
parent 9d6350f7f0
commit 11d5299f26
3 changed files with 40 additions and 2 deletions

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@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* /*
* Copyright (c) 2015, 2017-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2015, 2017-2019 The Linux Foundation. All rights reserved.
*/ */
#ifndef _LINUX_SWR_COMMON_H #ifndef _LINUX_SWR_COMMON_H
@@ -26,6 +26,8 @@ struct port_params {
u8 bp_mode; /* block pack mode */ u8 bp_mode; /* block pack mode */
u8 bgp_ctrl;/* block group control */ u8 bgp_ctrl;/* block group control */
u8 lane_ctrl;/* lane to be used */ u8 lane_ctrl;/* lane to be used */
u8 dir; /* master port dir: OUT = 0 IN = 1 */
u8 stream_type; /* PDM = 0, PCM = 1 */
}; };
struct swrm_port_config { struct swrm_port_config {

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@@ -28,6 +28,10 @@
#define SWRM_FRAME_SYNC_SEL 4000 /* 4KHz */ #define SWRM_FRAME_SYNC_SEL 4000 /* 4KHz */
#define SWRM_FRAME_SYNC_SEL_NATIVE 3675 /* 3.675KHz */ #define SWRM_FRAME_SYNC_SEL_NATIVE 3675 /* 3.675KHz */
#define SWRM_PCM_OUT 0
#define SWRM_PCM_IN 1
#define SWRM_SYSTEM_RESUME_TIMEOUT_MS 700 #define SWRM_SYSTEM_RESUME_TIMEOUT_MS 700
#define SWRM_SYS_SUSPEND_WAIT 1 #define SWRM_SYS_SUSPEND_WAIT 1
@@ -611,8 +615,11 @@ static void copy_port_tables(struct swr_mstr_ctrl *swrm,
swrm->mport_cfg[i].blk_grp_count = config[i].bgp_ctrl; swrm->mport_cfg[i].blk_grp_count = config[i].bgp_ctrl;
swrm->mport_cfg[i].word_length = config[i].wd_len; swrm->mport_cfg[i].word_length = config[i].wd_len;
swrm->mport_cfg[i].lane_ctrl = config[i].lane_ctrl; swrm->mport_cfg[i].lane_ctrl = config[i].lane_ctrl;
swrm->mport_cfg[i].dir = config[i].dir;
swrm->mport_cfg[i].stream_type = config[i].stream_type;
} }
} }
static int swrm_get_port_config(struct swr_mstr_ctrl *swrm) static int swrm_get_port_config(struct swr_mstr_ctrl *swrm)
{ {
struct port_params *params; struct port_params *params;
@@ -629,6 +636,23 @@ static int swrm_get_port_config(struct swr_mstr_ctrl *swrm)
return 0; return 0;
} }
static int swrm_pcm_port_config(struct swr_mstr_ctrl *swrm, u8 port_num,
bool dir, bool enable)
{
u16 reg_addr = 0;
if (!port_num || port_num > 6) {
dev_err(swrm->dev, "%s: invalid port: %d\n",
__func__, port_num);
return -EINVAL;
}
reg_addr = ((dir) ? SWRM_DIN_DP_PCM_PORT_CTRL(port_num) : \
SWRM_DOUT_DP_PCM_PORT_CTRL(port_num));
swr_master_write(swrm, reg_addr, enable);
return 0;
}
static int swrm_get_master_port(struct swr_mstr_ctrl *swrm, u8 *mstr_port_id, static int swrm_get_master_port(struct swr_mstr_ctrl *swrm, u8 *mstr_port_id,
u8 *mstr_ch_mask, u8 mstr_prt_type, u8 *mstr_ch_mask, u8 mstr_prt_type,
u8 slv_port_id) u8 slv_port_id)
@@ -653,7 +677,6 @@ found:
*mstr_ch_mask = swrm->port_mapping[i][j].ch_mask; *mstr_ch_mask = swrm->port_mapping[i][j].ch_mask;
return 0; return 0;
} }
static u32 swrm_get_packed_reg_val(u8 *cmd_id, u8 cmd_data, static u32 swrm_get_packed_reg_val(u8 *cmd_id, u8 cmd_data,
@@ -1024,6 +1047,9 @@ static void swrm_disable_ports(struct swr_master *master,
dev_dbg(swrm->dev, "%s: mport :%d, reg: 0x%x, val: 0x%x\n", dev_dbg(swrm->dev, "%s: mport :%d, reg: 0x%x, val: 0x%x\n",
__func__, i, __func__, i,
(SWRM_DP_PORT_CTRL_BANK(i+1, bank)), value); (SWRM_DP_PORT_CTRL_BANK(i+1, bank)), value);
if (mport->stream_type == SWR_PCM)
swrm_pcm_port_config(swrm, i, mport->dir, false);
} }
} }
@@ -1092,6 +1118,9 @@ static void swrm_copy_data_port_config(struct swr_master *master, u8 bank)
if (!mport->port_en) if (!mport->port_en)
continue; continue;
if (mport->stream_type == SWR_PCM)
swrm_pcm_port_config(swrm, i, mport->dir, true);
list_for_each_entry(port_req, &mport->port_req_list, list) { list_for_each_entry(port_req, &mport->port_req_list, list) {
slv_id = port_req->slave_port_id; slv_id = port_req->slave_port_id;
reg[len] = SWRM_CMD_FIFO_WR_CMD; reg[len] = SWRM_CMD_FIFO_WR_CMD;

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@@ -70,6 +70,11 @@ enum {
SWR_VISENSE_PORT, SWR_VISENSE_PORT,
}; };
enum {
SWR_PDM = 0,
SWR_PCM,
};
struct usecase { struct usecase {
u8 num_port; u8 num_port;
u8 num_ch; u8 num_ch;
@@ -91,6 +96,8 @@ struct swrm_mports {
u8 blk_pack_mode; u8 blk_pack_mode;
u8 word_length; u8 word_length;
u8 lane_ctrl; u8 lane_ctrl;
u8 dir;
u8 stream_type;
}; };
struct swrm_port_type { struct swrm_port_type {