qcacmn: hal: Fix misspellings

Fix misspellings in hal/... Change-Id: Icf033a647e6a15d46420d7102dc161b94fa7dd2c CRs-Fixed: 3304685
2022-09-30 15:08:58 -07:00
commit 117ae69181
--- a/hal/wifi3.0/be/hal_be_api_mon.h
+++ b/hal/wifi3.0/be/hal_be_api_mon.h
@@ -875,7 +875,7 @@ struct hal_tx_status_info {
 * @is_used: boolean flag to identify valid ppdu info
 * @is_data: boolean flag to identify data frame
 * @cur_usr_idx: Current user index of the PPDU
- * @reserved: for furture purpose
+ * @reserved: for future purpose
 * @prot_tlv_status: protection tlv status
 * @packet_info: packet information
 * @rx_status: monitor mode rx status information
--- a/hal/wifi3.0/be/hal_be_generic_api.c
+++ b/hal/wifi3.0/be/hal_be_generic_api.c
@@ -686,7 +686,7 @@ uint32_t hal_rx_msdu_reo_dst_ind_get_be(hal_soc_handle_t hal_soc_hdl,

 	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);

-	/* The first msdu in the link should exsist */
+	/* The first msdu in the link should exist */
 	msdu_desc_info = hal_rx_msdu_ext_desc_info_get_ptr(&msdu_details[0],
 							   hal_soc);
 	dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info);
--- a/hal/wifi3.0/be/hal_be_rx_tlv.h
+++ b/hal/wifi3.0/be/hal_be_rx_tlv.h
@@ -631,7 +631,7 @@ static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf)
 }

 /**
- * hal_rx_tlv_msdu_sgi_get(): API to get the Short Gaurd
+ * hal_rx_tlv_msdu_sgi_get(): API to get the Short Guard
 * Interval from rx_msdu_start TLV
 *
 * @buf: pointer to the start of RX PKT TLV headers
@@ -780,7 +780,7 @@ static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf)
 * entrance ring desc
 *
 * @desc: reo entrance ring descriptor
- * Return: qdesc adrress
+ * Return: qdesc address
 */
 static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
 {
@@ -793,7 +793,7 @@ static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
 *
 * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP)
 * @buf: pointer to the start of RX PKT TLV headers
- * Return: qdesc adrress in reo destination ring buffer
+ * Return: qdesc address in reo destination ring buffer
 */
 static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
 						uint8_t *buf)
@@ -1724,7 +1724,7 @@ bool hal_rx_get_fisa_timeout_be(uint8_t *buf)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/be/hal_be_tx.h
+++ b/hal/wifi3.0/be/hal_be_tx.h
@@ -84,7 +84,7 @@ enum hal_tx_notify_frame_type {
 * @encrypt_type: encrypt type
 * @src_buffer_swap: big-endia switch for packet buffer
 * @link_meta_swap: big-endian switch for link metadata
- * @index_lookup_enable: Enabel index lookup
+ * @index_lookup_enable: Enable index lookup
 * @addrx_en: Address-X search
 * @addry_en: Address-Y search
 * @mesh_enable:mesh enable flag
@@ -140,12 +140,12 @@ union hal_tx_cmn_config_ppe {
 * hal_tx_ppe_vp_config - SW config PPE VP table
 * @vp_num - Virtual port number
 * @pmac_id - Lmac ID
- * @bank_id: Bank ID correspondig to this I/F.
+ * @bank_id: Bank ID corresponding to this I/F.
 * @vdev_id: VDEV ID of the I/F.
 * @search_idx_reg_num: Register number of this SI.
 * @use_ppe_int_pri: Use the PPE INT_PRI to TID table
 * @to_fw: Use FW
- * @drop_prec_enable: Enable precendance drop.
+ * @drop_prec_enable: Enable precedence drop.
 */
 union hal_tx_ppe_vp_config {
 	struct {
--- a/hal/wifi3.0/hal_api.h
+++ b/hal/wifi3.0/hal_api.h
@@ -318,7 +318,7 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
 }

 /**
- * hal_write32_mb_confirm() - write register and check wirting result
+ * hal_write32_mb_confirm() - write register and check writing result
 *
 */
 static inline void hal_write32_mb_confirm(struct hal_soc *hal_soc,
@@ -931,11 +931,11 @@ enum hal_srng_dir hal_srng_get_dir(void *hal_soc, int ring_type);

 /* HAL memory information */
 struct hal_mem_info {
-	/* dev base virutal addr */
+	/* dev base virtual addr */
 	void *dev_base_addr;
 	/* dev base physical addr */
 	void *dev_base_paddr;
-	/* dev base ce virutal addr - applicable only for qca5018  */
+	/* dev base ce virtual addr - applicable only for qca5018  */
 	/* In qca5018 CE register are outside wcss block */
 	/* using a separate address space to access CE registers */
 	void *dev_base_addr_ce;
@@ -3194,7 +3194,7 @@ void *hal_srng_dst_prefetch(hal_soc_handle_t hal_soc_hdl,
 	uint32_t cnt;
 	/*
 	 * prefetching 4 HW descriptors will ensure atleast by the time
-	 * 5th HW descriptor is being processed it is guranteed that the
+	 * 5th HW descriptor is being processed it is guaranteed that the
 	 * 5th HW descriptor, its SW Desc, its nbuf and its nbuf's data
 	 * are in cache line. basically ensuring all the 4 (HW, SW, nbuf
 	 * & nbuf->data) are prefetched.
--- a/hal/wifi3.0/hal_api_mon.h
+++ b/hal/wifi3.0/hal_api_mon.h
@@ -776,7 +776,7 @@ struct hal_rx_ppdu_cfr_user_info {
 *    6: 18 Mbps
 *    7: 9 Mbps
 *
- * @gi_type: Indicates the gaurd interval.
+ * @gi_type: Indicates the guard interval.
 *    0: 0.8 us
 *    1: 0.4 us
 *    2: 1.6 us
@@ -1323,7 +1323,7 @@ static inline void hal_rx_proc_phyrx_other_receive_info_tlv(struct hal_soc *hal_
 * @rx_tlv_hdr: pointer to TLV header
 * @ppdu_info: pointer to ppdu_info
 * @hal_soc: HAL soc handle
- * @nbuf: PPDU status netowrk buffer
+ * @nbuf: PPDU status network buffer
 *
 * Return: HAL_TLV_STATUS_PPDU_NOT_DONE or HAL_TLV_STATUS_PPDU_DONE from tlv
 */
--- a/hal/wifi3.0/hal_internal.h
+++ b/hal/wifi3.0/hal_internal.h
@@ -160,7 +160,7 @@ struct rx_msdu_desc_info;
 typedef struct rx_msdu_desc_info *rx_msdu_desc_info_t;

 /**
- * Opaque hanlder for PPE VP config.
+ * Opaque handler for PPE VP config.
 */
 union hal_tx_ppe_vp_config;
 union hal_tx_cmn_config_ppe;
@@ -1397,7 +1397,7 @@ struct hal_soc {

 #if defined(FEATURE_HAL_DELAYED_REG_WRITE)
 /**
- *  hal_delayed_reg_write() - delayed regiter write
+ *  hal_delayed_reg_write() - delayed register write
 * @hal_soc: HAL soc handle
 * @srng: hal srng
 * @addr: iomem address
--- a/hal/wifi3.0/hal_reo.h
+++ b/hal/wifi3.0/hal_reo.h
@@ -174,7 +174,7 @@ struct hal_reo_cmd_params_std {
 /**
 * struct hal_reo_cmd_get_queue_stats_params: Parameters to
 *	CMD_GET_QUEUE_STATScommand
- * @clear: Clear stats after retreiving
+ * @clear: Clear stats after retrieving
 */
 struct hal_reo_cmd_get_queue_stats_params {
 	bool clear;
@@ -375,7 +375,7 @@ struct hal_reo_status_header {
 * @last_rx_deq_tstamp: Last dequeue timestamp
 * @rx_bitmap_31_0, rx_bitmap_63_32, rx_bitmap_95_64
 * @rx_bitmap_127_96, rx_bitmap_159_128, rx_bitmap_191_160
- * @rx_bitmap_223_192, rx_bitmap_255_224: Each bit corresonds to a frame
+ * @rx_bitmap_223_192, rx_bitmap_255_224: Each bit corresponds to a frame
 *	held in re-order queue
 * @curr_mpdu_cnt, curr_msdu_cnt: Number of MPDUs and MSDUs in the queue
 * @fwd_timeout_cnt: Frames forwarded due to timeout
@@ -441,7 +441,7 @@ struct hal_reo_flush_cache_status {
 * struct hal_reo_unblk_cache_status: UNBLOCK_CACHE status structure
 * @header: Common REO status header
 * @error: error detected
- * unblock_type: resoure or cache
+ * unblock_type: resource or cache
 */
 struct hal_reo_unblk_cache_status {
 	struct hal_reo_status_header header;
@@ -551,7 +551,7 @@ static inline uint8_t hal_find_zero_bit(uint8_t x)
 /* REO command ring routines */

 /**
- * hal_uniform_desc_hdr_setup - setup reo_queue_ext descritpro
+ * hal_uniform_desc_hdr_setup - setup reo_queue_ext descriptor
 * @owner - owner info
 * @buffer_type - buffer type
 */
--- a/hal/wifi3.0/hal_rx.h
+++ b/hal/wifi3.0/hal_rx.h
@@ -226,7 +226,7 @@ struct hal_rx_mpdu_desc_info {
 	uint16_t msdu_count;
 	uint16_t mpdu_seq; /* 12 bits for length */
 	uint32_t mpdu_flags;
-	uint32_t peer_meta_data; /* sw progamed meta-data:MAC Id & peer Id */
+	uint32_t peer_meta_data; /* sw programmed meta-data:MAC Id & peer Id */
 	uint16_t bar_frame;
 	uint8_t tid:4,
 		reserved:4;
@@ -1780,7 +1780,7 @@ uint32_t hal_rx_msdu_start_reception_type_get(hal_soc_handle_t hal_soc_hdl,

 /**
 * hal_reo_status_get_header_generic - Process reo desc info
- * @d - Pointer to reo descriptior
+ * @d - Pointer to reo descriptor
 * @b - tlv type info
 * @h - Pointer to hal_reo_status_header where info to be stored
 * @hal- pointer to hal_soc structure
@@ -2927,7 +2927,7 @@ hal_rx_reo_buf_type_get(hal_soc_handle_t hal_soc_hdl, hal_ring_desc_t rx_desc)
 * hal_rx_reo_prev_pn_get() - Get the previous pn from ring descriptor.
 * @hal_soc_hdl: HAL SoC handle
 * @ring_desc: REO ring descriptor
- * @prev_pn: Buffer to populate the previos PN
+ * @prev_pn: Buffer to populate the previous PN
 *
 * Return: None
 */
--- a/hal/wifi3.0/hal_rx_flow.c
+++ b/hal/wifi3.0/hal_rx_flow.c
@@ -23,10 +23,10 @@
 * hal_rx_flow_get_cmem_fse() - Get FSE from CMEM
 * @hal_soc_hdl: HAL SOC handle
 * @fse_offset: CMEM FSE offset
- * @fse: referece where FSE will be copied
+ * @fse: reference where FSE will be copied
 * @len: length of FSE
 *
- * Return: If read is succesfull or not
+ * Return: If read is successful or not
 */
 static void
 hal_rx_flow_get_cmem_fse(hal_soc_handle_t hal_soc_hdl, uint32_t fse_offset,
--- a/hal/wifi3.0/hal_srng.c
+++ b/hal/wifi3.0/hal_srng.c
@@ -109,7 +109,7 @@ static void hal_reg_write_fail_history_init(struct hal_soc *hal)
 #endif

 /**
- * hal_get_srng_ring_id() - get the ring id of a descriped ring
+ * hal_get_srng_ring_id() - get the ring id of a described ring
 * @hal: hal_soc data structure
 * @ring_type: type enum describing the ring
 * @ring_num: which ring of the ring type
@@ -399,7 +399,7 @@ static bool hal_validate_shadow_register(struct hal_soc *hal,
 	}
 	return true;
 error:
-	qdf_print("baddr %pK, desination %pK, shadow_address %pK s0offset %pK index %x",
+	qdf_print("baddr %pK, destination %pK, shadow_address %pK s0offset %pK index %x",
 		  hal->dev_base_addr, destination, shadow_address,
 		  shadow_0_offset, index);
 	QDF_BUG(0);
@@ -628,9 +628,9 @@ int hal_get_reg_write_pending_work(void *hal_soc)
 #endif

 /**
- * hal_process_reg_write_q_elem() - process a regiter write queue element
+ * hal_process_reg_write_q_elem() - process a register write queue element
 * @hal: hal_soc pointer
- * @q_elem: pointer to hal regiter write queue element
+ * @q_elem: pointer to hal register write queue element
 *
 * Return: The value which was written to the address
 */
@@ -845,7 +845,7 @@ void hal_flush_reg_write_work(hal_soc_handle_t hal_handle)
 * hal_reg_write_enqueue() - enqueue register writes into kworker
 * @hal_soc: hal_soc pointer
 * @srng: srng pointer
- * @addr: iomem address of regiter
+ * @addr: iomem address of register
 * @value: value to be written to iomem address
 *
 * This function executes from within the SRNG LOCK
--- a/hal/wifi3.0/hal_tx.h
+++ b/hal/wifi3.0/hal_tx.h
@@ -136,7 +136,7 @@ do {                                            \

 /*
 * Offset of HTT Tx Descriptor in WBM Completion
- * HTT Tx Desc structure is passed from firmware to host overlayed
+ * HTT Tx Desc structure is passed from firmware to host overlaid
 * on wbm_release_ring DWORDs 2,3 ,4 and 5for software based completions
 * (Exception frames and TQM bypass frames)
 */
@@ -372,7 +372,7 @@ static inline void hal_tx_ext_desc_set_tso_enable(void *desc,
 /**
 * hal_tx_ext_desc_set_tso_flags() - Set TSO Flags
 * @desc: Handle to Tx MSDU Extension Descriptor
- * @falgs: 32-bit word with all TSO flags consolidated
+ * @flags: 32-bit word with all TSO flags consolidated
 *
 * Return: none
 */
@@ -481,7 +481,7 @@ static inline void hal_tx_ext_desc_set_buffer(void *desc,
 * @desc: Handle to Tx MSDU Extension Descriptor
 * @frag_num: fragment number (value can be 0 to 5)
 * @iova: fragment dma address
- * @len: fragement Length
+ * @len: fragment Length
 *
 * Return: None
 */
--- a/hal/wifi3.0/kiwi/hal_kiwi.c
+++ b/hal/wifi3.0/kiwi/hal_kiwi.c
@@ -1167,7 +1167,7 @@ hal_rx_tlv_populate_mpdu_desc_info_kiwi(uint8_t *buf,

 /**
 * hal_reo_status_get_header_kiwi - Process reo desc info
- * @d - Pointer to reo descriptior
+ * @d - Pointer to reo descriptor
 * @b - tlv type info
 * @h1 - Pointer to hal_reo_status_header where info to be stored
 *
@@ -1693,10 +1693,10 @@ static uint32_t hal_rx_flow_get_cmem_fse_ts_kiwi(struct hal_soc *hal_soc,
 * hal_rx_flow_get_cmem_fse_kiwi() - Get FSE from CMEM
 * @hal_soc: hal_soc reference
 * @fse_offset: CMEM FSE offset
- * @fse: referece where FSE will be copied
+ * @fse: reference where FSE will be copied
 * @len: length of FSE
 *
- * Return: If read is succesfull or not
+ * Return: If read is successful or not
 */
 static void
 hal_rx_flow_get_cmem_fse_kiwi(struct hal_soc *hal_soc, uint32_t fse_offset,
@@ -1986,7 +1986,7 @@ uint64_t hal_fw_qtime_to_usecs(uint64_t time)
 }

 /**
- * hal_get_tsf_time_kiwi() - Get tsf time from scatch register
+ * hal_get_tsf_time_kiwi() - Get tsf time from scratch register
 * @hal_soc_hdl: HAL soc handle
 * @mac_id: mac_id
 * @tsf: pointer to update tsf value
--- a/hal/wifi3.0/kiwi/hal_kiwi_tx.h
+++ b/hal/wifi3.0/kiwi/hal_kiwi_tx.h
@@ -70,7 +70,7 @@ static void hal_tx_set_dscp_tid_map_kiwi(struct hal_soc *hal_soc, uint8_t *map,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/li/hal_li_generic_api.c
+++ b/hal/wifi3.0/li/hal_li_generic_api.c
@@ -814,7 +814,7 @@ hal_rx_tlv_get_freq_li(uint8_t *buf)
 }

 /**
- * hal_rx_tlv_sgi_get_li(): API to get the Short Gaurd
+ * hal_rx_tlv_sgi_get_li(): API to get the Short Guard
 * Interval from rx_msdu_start TLV
 *
 * @buf: pointer to the start of RX PKT TLV headers
@@ -995,7 +995,7 @@ hal_rx_msdu_reo_dst_ind_get_li(hal_soc_handle_t hal_soc_hdl,

 	msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc);

-	/* The first msdu in the link should exsist */
+	/* The first msdu in the link should exist */
 	msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[0],
 						       hal_soc);
 	dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info);
--- a/hal/wifi3.0/qca5018/hal_5018.c
+++ b/hal/wifi3.0/qca5018/hal_5018.c
@@ -233,7 +233,7 @@ static uint8_t hal_rx_get_tlv_5018(void *rx_tlv)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 uint8_t hal_rx_mpdu_start_tlv_tag_valid_5018(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qca5018/hal_5018_tx.h
+++ b/hal/wifi3.0/qca5018/hal_5018_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -81,7 +82,7 @@ static void hal_tx_set_dscp_tid_map_5018(struct hal_soc *soc,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qca5332/hal_5332.c
+++ b/hal/wifi3.0/qca5332/hal_5332.c
@@ -1000,7 +1000,7 @@ static void hal_rx_dump_msdu_end_tlv_5332(void *msduend,

 /**
 * hal_reo_status_get_header_5332 - Process reo desc info
- * @d - Pointer to reo descriptior
+ * @d - Pointer to reo descriptor
 * @b - tlv type info
 * @h1 - Pointer to hal_reo_status_header where info to be stored
 *
--- a/hal/wifi3.0/qca5332/hal_5332_tx.h
+++ b/hal/wifi3.0/qca5332/hal_5332_tx.h
@@ -69,7 +69,7 @@ static void hal_tx_set_dscp_tid_map_5332(struct hal_soc *hal_soc, uint8_t *map,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qca6290/hal_6290_tx.h
+++ b/hal/wifi3.0/qca6290/hal_6290_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -98,7 +99,7 @@ static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qca6390/hal_6390.c
+++ b/hal/wifi3.0/qca6390/hal_6390.c
@@ -991,7 +991,7 @@ uint16_t hal_rx_get_rx_sequence_6390(uint8_t *buf)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 static uint8_t hal_rx_mpdu_start_tlv_tag_valid_6390(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qca6390/hal_6390_tx.h
+++ b/hal/wifi3.0/qca6390/hal_6390_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -82,7 +83,7 @@ static void hal_tx_set_dscp_tid_map_6390(struct hal_soc *soc, uint8_t *map,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qca6490/hal_6490.c
+++ b/hal/wifi3.0/qca6490/hal_6490.c
@@ -1472,7 +1472,7 @@ bool hal_rx_get_fisa_timeout_6490(uint8_t *buf)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 static uint8_t hal_rx_mpdu_start_tlv_tag_valid_6490(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qca6490/hal_6490_tx.h
+++ b/hal/wifi3.0/qca6490/hal_6490_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -85,7 +86,7 @@ static void hal_tx_set_dscp_tid_map_6490(struct hal_soc *hal_soc, uint8_t *map,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qca6750/hal_6750.c
+++ b/hal/wifi3.0/qca6750/hal_6750.c
@@ -1474,7 +1474,7 @@ bool hal_rx_get_fisa_timeout_6750(uint8_t *buf)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 static uint8_t hal_rx_mpdu_start_tlv_tag_valid_6750(void *rx_tlv_hdr)
 {
@@ -1771,10 +1771,10 @@ static uint32_t hal_rx_flow_get_cmem_fse_ts_6750(struct hal_soc *hal_soc,
 * hal_rx_flow_get_cmem_fse_6750() - Get FSE from CMEM
 * @hal_soc: hal_soc reference
 * @fse_offset: CMEM FSE offset
- * @fse: referece where FSE will be copied
+ * @fse: reference where FSE will be copied
 * @len: length of FSE
 *
- * Return: If read is succesfull or not
+ * Return: If read is successful or not
 */
 static void
 hal_rx_flow_get_cmem_fse_6750(struct hal_soc *hal_soc, uint32_t fse_offset,
--- a/hal/wifi3.0/qca6750/hal_6750_tx.h
+++ b/hal/wifi3.0/qca6750/hal_6750_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -88,7 +89,7 @@ static void hal_tx_set_dscp_tid_map_6750(struct hal_soc *hal_soc, uint8_t *map,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qca8074v1/hal_8074v1.c
+++ b/hal/wifi3.0/qca8074v1/hal_8074v1.c
@@ -1038,7 +1038,7 @@ uint16_t hal_rx_get_rx_sequence_8074v1(uint8_t *buf)
 *
 * @rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 uint8_t hal_rx_mpdu_start_tlv_tag_valid_8074v1(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qca8074v2/hal_8074v2.c
+++ b/hal/wifi3.0/qca8074v2/hal_8074v2.c
@@ -1036,7 +1036,7 @@ static inline qdf_iomem_t hal_get_window_address_8074v2(struct hal_soc *hal_soc,
 *
 * @rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 uint8_t hal_rx_mpdu_start_tlv_tag_valid_8074v2(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qca8074v2/hal_8074v2_tx.h
+++ b/hal/wifi3.0/qca8074v2/hal_8074v2_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -85,7 +86,7 @@ static void hal_tx_set_dscp_tid_map_8074v2(struct hal_soc *soc,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qcn6122/hal_qcn6122.c
+++ b/hal/wifi3.0/qcn6122/hal_qcn6122.c
@@ -279,7 +279,7 @@ static uint8_t hal_rx_get_tlv_6122(void *rx_tlv)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 uint8_t hal_rx_mpdu_start_tlv_tag_valid_6122(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qcn6122/hal_qcn6122_tx.h
+++ b/hal/wifi3.0/qcn6122/hal_qcn6122_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
@@ -80,7 +81,7 @@ static void hal_tx_set_dscp_tid_map_6122(struct hal_soc *soc,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qcn9000/hal_9000.c
+++ b/hal/wifi3.0/qcn9000/hal_9000.c
@@ -289,7 +289,7 @@ static uint8_t hal_rx_get_tlv_9000(void *rx_tlv)
 *
 *@rx_tlv_hdr: start address of rx_pkt_tlvs
 *
- * Return: true if RX_MPDU_START is valied, else false.
+ * Return: true if RX_MPDU_START is valid, else false.
 */
 uint8_t hal_rx_mpdu_start_tlv_tag_valid_9000(void *rx_tlv_hdr)
 {
--- a/hal/wifi3.0/qcn9000/hal_9000_tx.h
+++ b/hal/wifi3.0/qcn9000/hal_9000_tx.h
@@ -1,5 +1,6 @@
 /*
 * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for
 * any purpose with or without fee is hereby granted, provided that the
@@ -81,7 +82,7 @@ static void hal_tx_set_dscp_tid_map_9000(struct hal_soc *soc,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |
--- a/hal/wifi3.0/qcn9224/hal_9224.h
+++ b/hal/wifi3.0/qcn9224/hal_9224.h
@@ -1119,7 +1119,7 @@ static void hal_rx_dump_msdu_end_tlv_9224(void *msduend,

 /**
 * hal_reo_status_get_header_9224 - Process reo desc info
- * @d - Pointer to reo descriptior
+ * @d - Pointer to reo descriptor
 * @b - tlv type info
 * @h1 - Pointer to hal_reo_status_header where info to be stored
 *
--- a/hal/wifi3.0/qcn9224/hal_9224_tx.h
+++ b/hal/wifi3.0/qcn9224/hal_9224_tx.h
@@ -71,7 +71,7 @@ static void hal_tx_set_dscp_tid_map_9224(struct hal_soc *hal_soc, uint8_t *map,

 	HAL_REG_WRITE(soc, cmn_reg_addr, regval);

-	/* Write 8 (24 bits) DSCP-TID mappings in each interation */
+	/* Write 8 (24 bits) DSCP-TID mappings in each iteration */
 	for (i = 0; i < 64; i += 8) {
 		value = (map[i] |
 			(map[i + 1] << 0x3) |