qcacmn: hal: Fix misspellings

Fix misspellings in hal/...

Change-Id: Icf033a647e6a15d46420d7102dc161b94fa7dd2c
CRs-Fixed: 3304685
这个提交包含在:
Jeff Johnson
2022-09-30 15:08:58 -07:00
提交者 Madan Koyyalamudi
父节点 60c5b8fe8b
当前提交 117ae69181
修改 35 个文件,包含 71 行新增63 行删除

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@@ -318,7 +318,7 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
}
/**
* hal_write32_mb_confirm() - write register and check wirting result
* hal_write32_mb_confirm() - write register and check writing result
*
*/
static inline void hal_write32_mb_confirm(struct hal_soc *hal_soc,
@@ -931,11 +931,11 @@ enum hal_srng_dir hal_srng_get_dir(void *hal_soc, int ring_type);
/* HAL memory information */
struct hal_mem_info {
/* dev base virutal addr */
/* dev base virtual addr */
void *dev_base_addr;
/* dev base physical addr */
void *dev_base_paddr;
/* dev base ce virutal addr - applicable only for qca5018 */
/* dev base ce virtual addr - applicable only for qca5018 */
/* In qca5018 CE register are outside wcss block */
/* using a separate address space to access CE registers */
void *dev_base_addr_ce;
@@ -3194,7 +3194,7 @@ void *hal_srng_dst_prefetch(hal_soc_handle_t hal_soc_hdl,
uint32_t cnt;
/*
* prefetching 4 HW descriptors will ensure atleast by the time
* 5th HW descriptor is being processed it is guranteed that the
* 5th HW descriptor is being processed it is guaranteed that the
* 5th HW descriptor, its SW Desc, its nbuf and its nbuf's data
* are in cache line. basically ensuring all the 4 (HW, SW, nbuf
* & nbuf->data) are prefetched.