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lahaina: add mi2s and tdm dai-links

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Change-Id: I3d541b110cc849b6e323f4df55be208e153d65eb
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
This commit is contained in:
Phani Kumar Uppalapati
2020-09-15 18:35:22 -07:00
parent 584244b6ac
commit 10bed4cd23
4 changed files with 137 additions and 45 deletions
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73
asoc/msm-audio-defs.h
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@@ -20,31 +20,31 @@
#define LPASS_BE_DISPLAY_PORT_RX "DISPLAY_PORT-RX"
#define LPASS_BE_PRI_AUXPCM_RX "AUXPCM-LPAIF_AXI-RX-PRIMARY"
#define LPASS_BE_PRI_AUXPCM_TX "AUXPCM-LPAIF_AXI-TX-PRIMARY"
#define LPASS_BE_SEC_AUXPCM_RX "AUXPCM-LPAIF_AXI-RX-SECONDARY"
#define LPASS_BE_SEC_AUXPCM_TX "AUXPCM-LPAIF_AXI-TX-SECONDARY"
#define LPASS_BE_TERT_AUXPCM_RX "AUXPCM-LPAIF_AXI-RX-TERTIARY"
#define LPASS_BE_TERT_AUXPCM_TX "AUXPCM-LPAIF_AXI-TX-TERTIARY"
#define LPASS_BE_QUAT_AUXPCM_RX "AUXPCM-LPAIF_AXI-RX-QUATERNARY"
#define LPASS_BE_QUAT_AUXPCM_TX "AUXPCM-LPAIF_AXI-TX-QUATERNARY"
#define LPASS_BE_QUIN_AUXPCM_RX "AUXPCM-LPAIF_AXI-RX-QUINARY"
#define LPASS_BE_QUIN_AUXPCM_TX "AUXPCM-LPAIF_AXI-TX-QUINARY"
#define LPASS_BE_SEN_AUXPCM_RX "AUXPCM-LPAIF_AXI-RX-SENARY"
#define LPASS_BE_SEN_AUXPCM_TX "AUXPCM-LPAIF_AXI-TX-SENARY"
#define LPASS_BE_PRI_AUXPCM_RX "AUXPCM-LPAIF-RX-PRIMARY"
#define LPASS_BE_PRI_AUXPCM_TX "AUXPCM-LPAIF-TX-PRIMARY"
#define LPASS_BE_SEC_AUXPCM_RX "AUXPCM-LPAIF-RX-SECONDARY"
#define LPASS_BE_SEC_AUXPCM_TX "AUXPCM-LPAIF-TX-SECONDARY"
#define LPASS_BE_TERT_AUXPCM_RX "AUXPCM-LPAIF-RX-TERTIARY"
#define LPASS_BE_TERT_AUXPCM_TX "AUXPCM-LPAIF-TX-TERTIARY"
#define LPASS_BE_QUAT_AUXPCM_RX "AUXPCM-LPAIF_RXTX-RX-QUATERNARY"
#define LPASS_BE_QUAT_AUXPCM_TX "AUXPCM-LPAIF_RXTX-TX-QUATERNARY"
#define LPASS_BE_QUIN_AUXPCM_RX "AUXPCM-LPAIF_VA-RX-QUINARY"
#define LPASS_BE_QUIN_AUXPCM_TX "AUXPCM-LPAIF_VA-TX-QUINARY"
#define LPASS_BE_SEN_AUXPCM_RX "AUXPCM-LPAIF_WSA-RX-SENARY"
#define LPASS_BE_SEN_AUXPCM_TX "AUXPCM-LPAIF_WSA-TX-SENARY"
#define LPASS_BE_PRI_MI2S_RX "MI2S-LPAIF_AXI-RX-PRIMARY"
#define LPASS_BE_PRI_MI2S_TX "MI2S-LPAIF_AXI-TX-PRIMARY"
#define LPASS_BE_SEC_MI2S_RX "MI2S-LPAIF_AXI-RX-SECONDARY"
#define LPASS_BE_SEC_MI2S_TX "MI2S-LPAIF_AXI-TX-SECONDARY"
#define LPASS_BE_TERT_MI2S_RX "MI2S-LPAIF_AXI-RX-TERTIARY"
#define LPASS_BE_TERT_MI2S_TX "MI2S-LPAIF_AXI-TX-TERTIARY"
#define LPASS_BE_QUAT_MI2S_RX "MI2S-LPAIF_AXI-RX-QUATERNARY"
#define LPASS_BE_QUAT_MI2S_TX "MI2S-LPAIF_AXI-TX-QUATERNARY"
#define LPASS_BE_QUIN_MI2S_RX "MI2S-LPAIF_AXI-RX-QUINARY"
#define LPASS_BE_QUIN_MI2S_TX "MI2S-LPAIF_AXI-TX-QUINARY"
#define LPASS_BE_SEN_MI2S_TX "MI2S-LPAIF_AXI-RX-SENARY"
#define LPASS_BE_SEN_MI2S_RX "MI2S-LPAIF_AXI-TX-SENARY"
#define LPASS_BE_PRI_MI2S_RX "MI2S-LPAIF-RX-PRIMARY"
#define LPASS_BE_PRI_MI2S_TX "MI2S-LPAIF-TX-PRIMARY"
#define LPASS_BE_SEC_MI2S_RX "MI2S-LPAIF-RX-SECONDARY"
#define LPASS_BE_SEC_MI2S_TX "MI2S-LPAIF-TX-SECONDARY"
#define LPASS_BE_TERT_MI2S_RX "MI2S-LPAIF-RX-TERTIARY"
#define LPASS_BE_TERT_MI2S_TX "MI2S-LPAIF-TX-TERTIARY"
#define LPASS_BE_QUAT_MI2S_RX "MI2S-LPAIF_RXTX-RX-QUATERNARY"
#define LPASS_BE_QUAT_MI2S_TX "MI2S-LPAIF_RXTX-TX-QUATERNARY"
#define LPASS_BE_QUIN_MI2S_RX "MI2S-LPAIF_VA-RX-QUINARY"
#define LPASS_BE_QUIN_MI2S_TX "MI2S-LPAIF_VA-TX-QUINARY"
#define LPASS_BE_SEN_MI2S_TX "MI2S-LPAIF_WSA-RX-SENARY"
#define LPASS_BE_SEN_MI2S_RX "MI2S-LPAIF_WSA-TX-SENARY"
#define LPASS_BE_SLIMBUS_0_RX "SLIM-DEV1-RX-0"
#define LPASS_BE_SLIMBUS_0_TX "SLIM-DEV1-TX-0"
@@ -63,18 +63,19 @@
#define LPASS_BE_SLIMBUS_7_RX "SLIM-DEV1-RX-7"
#define LPASS_BE_SLIMBUS_7_TX "SLIM-DEV1-TX-7"
#define LPASS_BE_PRI_TDM_RX_0 "TDM-LPAIF_AXI-RX-PRIMARY"
#define LPASS_BE_PRI_TDM_TX_0 "TDM-LPAIF_AXI-TX-PRIMARY"
#define LPASS_BE_SEC_TDM_RX_0 "TDM-LPAIF_AXI-RX-SECONDARY"
#define LPASS_BE_SEC_TDM_TX_0 "TDM-LPAIF_AXI-TX-SECONDARY"
#define LPASS_BE_TERT_TDM_RX_0 "TDM-LPAIF_AXI-RX-TERTIARY"
#define LPASS_BE_TERT_TDM_TX_0 "TDM-LPAIF_AXI-TX-TERTIARY"
#define LPASS_BE_QUAT_TDM_RX_0 "TDM-LPAIF_AXI-RX-QUATERNARY"
#define LPASS_BE_QUAT_TDM_TX_0 "TDM-LPAIF_AXI-TX-QUATERNARY"
#define LPASS_BE_QUIN_TDM_RX_0 "TDM-LPAIF_AXI-RX-QUINARY"
#define LPASS_BE_QUIN_TDM_TX_0 "TDM-LPAIF_AXI-TX-QUINARY"
#define LPASS_BE_SEN_TDM_RX_0 "TDM-LPAIF_AXI-RX-SENARY"
#define LPASS_BE_SEN_TDM_TX_0 "TDM-LPAIF_AXI-TX-SENARY"
#define LPASS_BE_PRI_TDM_RX_0 "TDM-LPAIF-RX-PRIMARY"
#define LPASS_BE_PRI_TDM_TX_0 "TDM-LPAIF-TX-PRIMARY"
#define LPASS_BE_SEC_TDM_RX_0 "TDM-LPAIF-RX-SECONDARY"
#define LPASS_BE_SEC_TDM_TX_0 "TDM-LPAIF-TX-SECONDARY"
#define LPASS_BE_TERT_TDM_RX_0 "TDM-LPAIF-RX-TERTIARY"
#define LPASS_BE_TERT_TDM_TX_0 "TDM-LPAIF-TX-TERTIARY"
#define LPASS_BE_SEN_TDM_RX_0 "TDM-LPAIF_WSA-RX-SENARY"
#define LPASS_BE_SEN_TDM_TX_0 "TDM-LPAIF_WSA-TX-SENARY"
#define LPASS_BE_QUAT_TDM_RX_0 "TDM-LPAIF_RXTX-RX-QUATERNARY"
#define LPASS_BE_QUAT_TDM_TX_0 "TDM-LPAIF_RXTX-TX-QUATERNARY"
#define LPASS_BE_QUIN_TDM_RX_0 "TDM-LPAIF_VA-RX-QUINARY"
#define LPASS_BE_QUIN_TDM_TX_0 "TDM-LPAIF_VA-TX-QUINARY"
#define LPASS_BE_USB_AUDIO_RX "USB_AUDIO-RX"
#define LPASS_BE_USB_AUDIO_TX "USB_AUDIO-TX"