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@@ -118,6 +118,11 @@
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#define WLAN_CFG_REO_STATUS_RING_MASK_2 0x0
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#define WLAN_CFG_REO_STATUS_RING_MASK_3 0x0
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+#define WLAN_CFG_RXDMA2HOST_RING_MASK_0 0x1
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+#define WLAN_CFG_RXDMA2HOST_RING_MASK_1 0x2
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+#define WLAN_CFG_RXDMA2HOST_RING_MASK_2 0x4
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+#define WLAN_CFG_RXDMA2HOST_RING_MASK_3 0x0
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+
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#define WLAN_CFG_DP_TX_NUM_POOLS 3
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/* Change this to a lower value to enforce scattered idle list mode */
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#define WLAN_CFG_MAX_ALLOC_SIZE (2 << 20)
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@@ -173,6 +178,12 @@ static const int reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
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WLAN_CFG_REO_STATUS_RING_MASK_2,
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WLAN_CFG_REO_STATUS_RING_MASK_3};
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+static const int rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
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+ WLAN_CFG_RXDMA2HOST_RING_MASK_0,
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+ WLAN_CFG_RXDMA2HOST_RING_MASK_1,
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+ WLAN_CFG_RXDMA2HOST_RING_MASK_2,
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+ WLAN_CFG_RXDMA2HOST_RING_MASK_3};
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+
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/**
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* struct wlan_cfg_dp_soc_ctxt - Configuration parameters for SoC (core TxRx)
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* @num_int_ctxts - Number of NAPI/Interrupt contexts to be registered for DP
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@@ -194,6 +205,8 @@ static const int reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {
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* @int_rx_ring_mask - Bitmap of Rx interrupts mapped to each NAPI/Intr context
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* @int_rx_mon_ring_mask - Bitmap of Rx monitor ring interrupts mapped to each
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* NAPI/Intr context
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+ * @int_rxdma2host_ring_mask - Bitmap of RXDMA2host ring interrupts mapped to
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+ * each NAPI/Intr context
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* @int_ce_ring_mask - Bitmap of CE interrupts mapped to each NAPI/Intr context
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* @lro_enabled - is LRO enabled
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* @rx_hash - Enable hash based steering of rx packets
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@@ -222,6 +235,7 @@ struct wlan_cfg_dp_soc_ctxt {
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int int_tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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int int_rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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int int_rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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+ int int_rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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int int_ce_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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int int_rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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int int_rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
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@@ -229,6 +243,8 @@ struct wlan_cfg_dp_soc_ctxt {
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bool lro_enabled;
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bool rx_hash;
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int nss_cfg;
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+ int hw_macid[MAX_PDEV_CNT];
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+ int base_hw_macid;
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};
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/**
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@@ -294,11 +310,23 @@ struct wlan_cfg_dp_soc_ctxt *wlan_cfg_soc_attach()
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rx_wbm_rel_ring_mask[i];
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wlan_cfg_ctx->int_reo_status_ring_mask[i] =
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reo_status_ring_mask[i];
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+ wlan_cfg_ctx->int_rxdma2host_ring_mask[i] =
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+ rxdma2host_ring_mask[i];
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}
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wlan_cfg_ctx->rx_hash = WLAN_RX_HASH_ENABLE;
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wlan_cfg_ctx->lro_enabled = WLAN_LRO_ENABLE;
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+ /* This is default mapping and can be overridden by HW config
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+ * received from FW */
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+ wlan_cfg_set_hw_macid(wlan_cfg_ctx, 0, 1);
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+ if (MAX_PDEV_CNT > 1)
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+ wlan_cfg_set_hw_macid(wlan_cfg_ctx, 1, 3);
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+ if (MAX_PDEV_CNT > 2)
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+ wlan_cfg_set_hw_macid(wlan_cfg_ctx, 2, 2);
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+
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+ wlan_cfg_ctx->base_hw_macid = 1;
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+
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return wlan_cfg_ctx;
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}
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@@ -357,6 +385,37 @@ void wlan_cfg_set_rx_mon_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
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cfg->int_rx_mon_ring_mask[context] = mask;
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}
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+void wlan_cfg_set_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
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+ int context, int mask)
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+{
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+ cfg->int_rxdma2host_ring_mask[context] = mask;
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+}
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+
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+int wlan_cfg_get_rxdma2host_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
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+ int context)
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+{
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+ return cfg->int_rxdma2host_ring_mask[context];
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+}
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+
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+void wlan_cfg_set_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx,
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+ int hw_macid)
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+{
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+ qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
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+ cfg->hw_macid[pdev_idx] = hw_macid;
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+}
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+
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+int wlan_cfg_get_hw_macid(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx)
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+{
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+ qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
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+ return cfg->hw_macid[pdev_idx];
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+}
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+
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+int wlan_cfg_get_hw_mac_idx(struct wlan_cfg_dp_soc_ctxt *cfg, int pdev_idx)
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+{
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+ qdf_assert_always(pdev_idx < MAX_PDEV_CNT);
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+ return cfg->hw_macid[pdev_idx] - cfg->base_hw_macid;
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+}
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+
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void wlan_cfg_set_ce_ring_mask(struct wlan_cfg_dp_soc_ctxt *cfg,
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int context, int mask)
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{
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