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@@ -214,9 +214,10 @@
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* 3.90 Add HTT_T2H_MSG_TYPE_MLO_TIMESTAMP_OFFSET_IND def.
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* 3.91 Add HTT_T2H_MSG_TYPE_MLO_RX_PEER_MAP, _UNMAP defs.
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* 3.92 Add HTT_H2T_MSG_TYPE_RXDMA_RXOLE_PPE_CFG def.
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+ * 3.93 Add HTT_T2H_MSG_TYPE_PEER_MAP_V3 def.
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*/
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#define HTT_CURRENT_VERSION_MAJOR 3
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-#define HTT_CURRENT_VERSION_MINOR 92
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+#define HTT_CURRENT_VERSION_MINOR 93
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#define HTT_NUM_TX_FRAG_DESC 1024
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@@ -7183,6 +7184,7 @@ enum htt_t2h_msg_type {
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HTT_T2H_MSG_TYPE_MLO_TIMESTAMP_OFFSET_IND = 0x28,
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HTT_T2H_MSG_TYPE_MLO_RX_PEER_MAP = 0x29,
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HTT_T2H_MSG_TYPE_MLO_RX_PEER_UNMAP = 0x2a,
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+ HTT_T2H_MSG_TYPE_PEER_MAP_V3 = 0x2b,
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HTT_T2H_MSG_TYPE_TEST,
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@@ -9762,6 +9764,258 @@ PREPACK struct htt_tx_offload_deliver_ind_hdr_t
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#define HTT_RX_PEER_MAP_V2_BYTES 32
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+/**
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+ * @brief target -> host rx peer map V3 message definition
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+ *
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+ * MSG_TYPE => HTT_T2H_MSG_TYPE_PEER_MAP_V3
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+ *
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+ * @details
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+ * The following diagram shows the format of the rx peer map v3 message sent
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+ * from the target to the host.
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+ * Format inherits HTT_T2H_MSG_TYPE_PEER_MAP_V2 published above
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+ * This layout assumes the target operates as little-endian.
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+ *
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+ * |31 24|23 20|19|18|17|16|15 8|7 0|
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+ * |-----------------+--------+--+--+--+--+-----------------+-----------------|
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+ * | SW peer ID | VDEV ID | msg type |
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+ * |-----------------+--------------------+-----------------+-----------------|
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+ * | MAC addr 3 | MAC addr 2 | MAC addr 1 | MAC addr 0 |
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+ * |-----------------+--------------------+-----------------+-----------------|
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+ * | Multicast SW peer ID | MAC addr 5 | MAC addr 4 |
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+ * |-----------------+--------+-----------+-----------------+-----------------|
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+ * | HTT_MSDU_IDX_ |RESERVED| CACHE_ | |
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+ * | VALID_MASK |(4bits) | SET_NUM | HW peer ID / AST index |
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+ * | (8bits) | | (4bits) | |
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+ * |-----------------+--------+--+--+--+--------------------------------------|
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+ * | RESERVED |E |O | | |
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+ * | (13bits) |A |A |NH| on-Chip PMAC_RXPCU AST index |
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+ * | |V |V | | |
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+ * |-----------------+--------------------+-----------------------------------|
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+ * | HTT_MSDU_IDX_ | RESERVED | |
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+ * | VALID_MASK_EXT | (8bits) | EXT AST index |
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+ * | (8bits) | | |
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+ * |-----------------+--------------------+-----------------------------------|
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+ * | Reserved_2 |
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+ * |--------------------------------------------------------------------------|
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+ * | Reserved_3 |
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+ * |--------------------------------------------------------------------------|
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+ *
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+ * Where:
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+ * EAV = EXT_AST_VALID flag, for "EXT AST index"
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+ * OAV = ONCHIP_AST_VALID flag, for "on-Chip PMAC_RXPCU AST index"
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+ * NH = Next Hop
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+ * The following field definitions describe the format of the rx peer map v3
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+ * messages sent from the target to the host.
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+ * - MSG_TYPE
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+ * Bits 7:0
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+ * Purpose: identifies this as a peer map v3 message
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+ * Value: 0x2b (HTT_T2H_MSG_TYPE_PEER_MAP_V3)
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+ * - VDEV_ID
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+ * Bits 15:8
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+ * Purpose: Indicates which virtual device the peer is associated with.
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+ * - SW_PEER_ID
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+ * Bits 31:16
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+ * Purpose: The peer ID (index) that WAL has allocated for this peer.
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+ * - MAC_ADDR_L32
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+ * Bits 31:0
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+ * Purpose: Identifies which peer node the peer ID is for.
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+ * Value: lower 4 bytes of peer node's MAC address
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+ * - MAC_ADDR_U16
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+ * Bits 15:0
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+ * Purpose: Identifies which peer node the peer ID is for.
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+ * Value: upper 2 bytes of peer node's MAC address
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+ * - MULTICAST_SW_PEER_ID
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+ * Bits 31:16
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+ * Purpose: The multicast peer ID (index)
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+ * Value: set to HTT_INVALID_PEER if not valid
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+ * - HW_PEER_ID / AST_INDEX
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+ * Bits 15:0
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+ * Purpose: Identifies the HW peer ID corresponding to the peer MAC
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+ * address, so for rx frames marked for rx --> tx forwarding, the
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+ * host can determine from the HW peer ID provided as meta-data with
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+ * the rx frame which peer the frame is supposed to be forwarded to.
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+ * - CACHE_SET_NUM
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+ * Bits 19:16
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+ * Purpose: Cache Set Number for AST_INDEX
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+ * Cache set number that should be used to cache the index based
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+ * search results, for address and flow search.
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+ * This value should be equal to LSB 4 bits of the hash value
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+ * of match data, in case of search index points to an entry which
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+ * may be used in content based search also. The value can be
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+ * anything when the entry pointed by search index will not be
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+ * used for content based search.
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+ * - HTT_MSDU_IDX_VALID_MASK
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+ * Bits 31:24
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+ * Purpose: Shows MSDU indexes valid mask for AST_INDEX
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+ * - ONCHIP_AST_IDX / RESERVED
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+ * Bits 15:0
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+ * Purpose: This field is valid only when split AST feature is enabled.
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+ * The ONCHIP_AST_VALID flag identifies whether this field is valid.
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+ * If valid, identifies the HW peer ID corresponding to the peer MAC
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+ * address, this ast_idx is used for LMAC modules for RXPCU.
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+ * - NEXT_HOP
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+ * Bits 16
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+ * Purpose: Flag indicates next_hop AST entry used for WDS
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+ * (Wireless Distribution System).
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+ * - ONCHIP_AST_VALID
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+ * Bits 17
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+ * Purpose: Flag indicates valid data behind of the ONCHIP_AST_IDX field
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+ * - EXT_AST_VALID
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+ * Bits 18
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+ * Purpose: Flag indicates valid data behind of the EXT_AST_INDEX field
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+ * - EXT_AST_INDEX
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+ * Bits 15:0
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+ * Purpose: This field describes Extended AST index
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+ * Valid if EXT_AST_VALID flag set
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+ * - HTT_MSDU_IDX_VALID_MASK_EXT
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+ * Bits 31:24
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+ * Purpose: Shows MSDU indexes valid mask for EXT_AST_INDEX
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+*/
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+/* dword 0 */
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+#define HTT_RX_PEER_MAP_V3_SW_PEER_ID_M 0xffff0000
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+#define HTT_RX_PEER_MAP_V3_SW_PEER_ID_S 16
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+#define HTT_RX_PEER_MAP_V3_VDEV_ID_M 0x0000ff00
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+#define HTT_RX_PEER_MAP_V3_VDEV_ID_S 8
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+/* dword 1 */
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+#define HTT_RX_PEER_MAP_V3_MAC_ADDR_L32_M 0xffffffff
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+#define HTT_RX_PEER_MAP_V3_MAC_ADDR_L32_S 0
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+/* dword 2 */
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+#define HTT_RX_PEER_MAP_V3_MAC_ADDR_U16_M 0x0000ffff
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+#define HTT_RX_PEER_MAP_V3_MAC_ADDR_U16_S 0
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+#define HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_M 0xffff0000
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+#define HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_S 16
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+/* dword 3 */
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_M 0xff000000
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_S 24
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+#define HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_M 0x000f0000
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+#define HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_S 16
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+#define HTT_RX_PEER_MAP_V3_HW_PEER_ID_M 0x0000ffff
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+#define HTT_RX_PEER_MAP_V3_HW_PEER_ID_S 0
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+/* dword 4 */
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_M 0x00040000
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_S 18
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+#define HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_M 0x00020000
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+#define HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_S 17
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+#define HTT_RX_PEER_MAP_V3_NEXT_HOP_M 0x00010000
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+#define HTT_RX_PEER_MAP_V3_NEXT_HOP_S 16
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+#define HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_M 0x0000ffff
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+#define HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_S 0
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+/* dword 5 */
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_M 0xff000000
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_S 24
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_IDX_M 0x0000ffff
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_IDX_S 0
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+
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+#define HTT_RX_PEER_MAP_V3_VDEV_ID_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_VDEV_ID, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_VDEV_ID_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_VDEV_ID_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_VDEV_ID_M) >> HTT_RX_PEER_MAP_V3_VDEV_ID_S)
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+
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+#define HTT_RX_PEER_MAP_V3_SW_PEER_ID_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_SW_PEER_ID, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_SW_PEER_ID_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_SW_PEER_ID_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_SW_PEER_ID_M) >> HTT_RX_PEER_MAP_V3_SW_PEER_ID_S)
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+
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+#define HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_M) >> HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_S)
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+
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+#define HTT_RX_PEER_MAP_V3_HW_PEER_ID_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_HW_PEER_ID, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_HW_PEER_ID_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_HW_PEER_ID_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_HW_PEER_ID_M) >> HTT_RX_PEER_MAP_V3_HW_PEER_ID_S)
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+
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+#define HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_CACHE_SET_NUM, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_M) >> HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_S)
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+
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_M) >> HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_S)
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+
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+#define HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_M) >> HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_S)
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+
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+#define HTT_RX_PEER_MAP_V3_NEXT_HOP_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_NEXT_HOP, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_NEXT_HOP_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_NEXT_HOP_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_NEXT_HOP_M) >> HTT_RX_PEER_MAP_V3_NEXT_HOP_S)
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+
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+#define HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_M) >> HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_S)
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+
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_M) >> HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_S)
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+
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_IDX_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_EXT_AST_IDX, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_EXT_AST_IDX_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_IDX_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_EXT_AST_IDX_M) >> HTT_RX_PEER_MAP_V3_EXT_AST_IDX_S)
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+
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_SET(word, value) \
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+ do { \
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+ HTT_CHECK_SET_VAL(HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST, value); \
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+ (word) |= (value) << HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_S; \
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+ } while (0)
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_GET(word) \
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+ (((word) & HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_M) >> HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_S)
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+
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+#define HTT_RX_PEER_MAP_V3_MAC_ADDR_OFFSET 4 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_MULTICAST_SW_PEER_ID_OFFSET 8 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_HW_PEER_ID_OFFSET 12 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_CACHE_SET_NUM_OFFSET 12 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_AST_OFFSET 12 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_ON_CHIP_PMAC_RXPCU_AST_IDX_OFFSET 16 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_NEXT_HOP_OFFSET 16 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_ONCHIP_AST_VALID_FLAG_OFFSET 16 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_VALID_FLAG_OFFSET 16 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_EXT_AST_IDX_OFFSET 20 /* bytes */
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+#define HTT_RX_PEER_MAP_V3_MSDU_IDX_VM_EXT_AST_OFFSET 20 /* bytes */
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+
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+#define HTT_RX_PEER_MAP_V3_BYTES 32
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+
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/**
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* @brief target -> host rx peer unmap V2 message definition
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*
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