disp: msm: sde: use INTF mdp_vsync timestamp only for video-mode
MDSS 9.0.0 added support for logging MDP_VSYNC timestamp. Use it for video-mode panels and rely on PANEL_VSYNC timestamp for cmd-mode panels as it relies on external panel TE. Change-Id: I09b25d893075bee7cb2da98d4c4b4e54eb09bd6e Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
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@@ -158,15 +158,16 @@ ktime_t sde_encoder_calc_last_vsync_timestamp(struct drm_encoder *drm_enc)
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struct intf_status intf_status = {0};
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struct intf_status intf_status = {0};
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unsigned long features;
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unsigned long features;
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u32 fps;
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u32 fps;
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bool is_cmd, is_vid;
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sde_enc = to_sde_encoder_virt(drm_enc);
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sde_enc = to_sde_encoder_virt(drm_enc);
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cur_master = sde_enc->cur_master;
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cur_master = sde_enc->cur_master;
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fps = sde_encoder_get_fps(drm_enc);
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fps = sde_encoder_get_fps(drm_enc);
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is_cmd = sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_CMD_MODE);
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is_vid = sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_VIDEO_MODE);
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if (!cur_master || !cur_master->hw_intf || !fps
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if (!cur_master || !cur_master->hw_intf || !fps
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|| !cur_master->hw_intf->ops.get_vsync_timestamp
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|| !cur_master->hw_intf->ops.get_vsync_timestamp || (!is_cmd && !is_vid))
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|| (!sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_CMD_MODE)
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&& !sde_encoder_check_curr_mode(drm_enc, MSM_DISPLAY_VIDEO_MODE)))
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return 0;
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return 0;
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features = cur_master->hw_intf->cap->features;
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features = cur_master->hw_intf->cap->features;
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@@ -182,7 +183,7 @@ ktime_t sde_encoder_calc_last_vsync_timestamp(struct drm_encoder *drm_enc)
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return 0;
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return 0;
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}
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}
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vsync_counter = cur_master->hw_intf->ops.get_vsync_timestamp(cur_master->hw_intf);
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vsync_counter = cur_master->hw_intf->ops.get_vsync_timestamp(cur_master->hw_intf, is_vid);
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qtmr_counter = arch_timer_read_counter();
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qtmr_counter = arch_timer_read_counter();
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cur_time = ktime_get_ns();
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cur_time = ktime_get_ns();
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@@ -224,14 +224,14 @@ static void sde_hw_intf_reset_counter(struct sde_hw_intf *ctx)
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SDE_REG_WRITE(c, INTF_LINE_COUNT, BIT(31));
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SDE_REG_WRITE(c, INTF_LINE_COUNT, BIT(31));
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}
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}
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static u64 sde_hw_intf_get_vsync_timestamp(struct sde_hw_intf *ctx)
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static u64 sde_hw_intf_get_vsync_timestamp(struct sde_hw_intf *ctx, bool is_vid)
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{
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{
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struct sde_hw_blk_reg_map *c = &ctx->hw;
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struct sde_hw_blk_reg_map *c = &ctx->hw;
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u32 timestamp_lo, timestamp_hi;
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u32 timestamp_lo, timestamp_hi;
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u64 timestamp = 0;
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u64 timestamp = 0;
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u32 reg_ts_0, reg_ts_1;
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u32 reg_ts_0, reg_ts_1;
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if (ctx->cap->features & BIT(SDE_INTF_MDP_VSYNC_TS)) {
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if (ctx->cap->features & BIT(SDE_INTF_MDP_VSYNC_TS) && is_vid) {
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reg_ts_0 = INTF_MDP_VSYNC_TIMESTAMP0;
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reg_ts_0 = INTF_MDP_VSYNC_TIMESTAMP0;
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reg_ts_1 = INTF_MDP_VSYNC_TIMESTAMP1;
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reg_ts_1 = INTF_MDP_VSYNC_TIMESTAMP1;
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} else {
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} else {
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@@ -236,7 +236,7 @@ struct sde_hw_intf_ops {
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/**
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/**
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* Get the HW vsync timestamp counter
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* Get the HW vsync timestamp counter
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*/
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*/
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u64 (*get_vsync_timestamp)(struct sde_hw_intf *intf);
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u64 (*get_vsync_timestamp)(struct sde_hw_intf *intf, bool is_vid);
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/**
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/**
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* Enable processing of 2 pixels per clock
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* Enable processing of 2 pixels per clock
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