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cnss2: Add shadow register version 3 for kiwi

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Add shadow register version 3 structure for kiwi
CE7 support for wmi logging.

Change-Id: Ie37dcc47ff4b63726cee43a3d26cb0aad24d44ed
This commit is contained in:
Mohammed Siddiq
2022-03-31 17:57:18 +05:30
parent eadcd47888
commit 0db7057bb6
2 changed files with 37 additions and 10 deletions
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18
cnss2/qmi.c
View File

@@ -45,6 +45,9 @@
#define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
#define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
#define DMS_QMI_MAX_MSG_LEN SZ_256 #define DMS_QMI_MAX_MSG_LEN SZ_256
#define MAX_SHADOW_REG_RESERVED 2
#define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
MAX_SHADOW_REG_RESERVED)
#define QMI_WLFW_MAC_READY_TIMEOUT_MS 50 #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
#define QMI_WLFW_MAC_READY_MAX_RETRY 200 #define QMI_WLFW_MAC_READY_MAX_RETRY 200
@@ -1379,6 +1382,7 @@ int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num; req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
} }
if (plat_priv->device_id != KIWI_DEVICE_ID) {
req->shadow_reg_v2_valid = 1; req->shadow_reg_v2_valid = 1;
if (config->num_shadow_reg_v2_cfg > if (config->num_shadow_reg_v2_cfg >
QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01) QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
@@ -1389,6 +1393,20 @@ int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg, memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01) sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
* req->shadow_reg_v2_len); * req->shadow_reg_v2_len);
} else {
cnss_pr_dbg("Shadow reg v3 len: %d\n",
config->num_shadow_reg_v3_cfg);
req->shadow_reg_v3_valid = 1;
if (config->num_shadow_reg_v3_cfg >
MAX_NUM_SHADOW_REG_V3)
req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
else
req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
* req->shadow_reg_v3_len);
}
ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn, ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
wlfw_wlan_cfg_resp_msg_v01_ei, resp); wlfw_wlan_cfg_resp_msg_v01_ei, resp);

11
inc/cnss2.h
View File

@@ -1,5 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */ /*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _NET_CNSS2_H #ifndef _NET_CNSS2_H
#define _NET_CNSS2_H #define _NET_CNSS2_H
@@ -160,6 +163,10 @@ struct cnss_rri_over_ddr_cfg {
u32 base_addr_high; u32 base_addr_high;
}; };
struct cnss_shadow_reg_v3_cfg {
u32 addr;
};
struct cnss_wlan_enable_cfg { struct cnss_wlan_enable_cfg {
u32 num_ce_tgt_cfg; u32 num_ce_tgt_cfg;
struct cnss_ce_tgt_pipe_cfg *ce_tgt_cfg; struct cnss_ce_tgt_pipe_cfg *ce_tgt_cfg;
@@ -171,6 +178,8 @@ struct cnss_wlan_enable_cfg {
struct cnss_shadow_reg_v2_cfg *shadow_reg_v2_cfg; struct cnss_shadow_reg_v2_cfg *shadow_reg_v2_cfg;
bool rri_over_ddr_cfg_valid; bool rri_over_ddr_cfg_valid;
struct cnss_rri_over_ddr_cfg rri_over_ddr_cfg; struct cnss_rri_over_ddr_cfg rri_over_ddr_cfg;
u32 num_shadow_reg_v3_cfg;
struct cnss_shadow_reg_v3_cfg *shadow_reg_v3_cfg;
}; };
enum cnss_driver_mode { enum cnss_driver_mode {