audio-kernel: select RCO clock if lpi PCM logging is enabled

Select clock root as RCO for VA use-case whenever LPI
PCM logging feature is enabled.

Change-Id: I461b2afb9eeb595975d550d56c54e7548f0f2130
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>

asoc/codecs/lpass-cdc/lpass-cdc-va-macro.c

@@ -330,7 +330,7 @@ static int lpass_cdc_va_macro_event_handler(struct snd_soc_component *component,
 		}
 		ret = lpass_cdc_clk_rsc_request_clock(va_priv->dev,
 						va_priv->default_clk_id,
-						VA_CORE_CLK, true);
+						va_priv->clk_id, true);
 		if (ret < 0)
 			dev_err_ratelimited(va_priv->dev,
 				"%s, failed to enable clk, ret:%d\n",
@@ -338,7 +338,7 @@ static int lpass_cdc_va_macro_event_handler(struct snd_soc_component *component,
 		else
 			lpass_cdc_clk_rsc_request_clock(va_priv->dev,
 						va_priv->default_clk_id,
-						VA_CORE_CLK, false);
+						va_priv->clk_id, false);
 		lpass_cdc_va_macro_core_vote(va_priv, false);
 		break;
 	case LPASS_CDC_MACRO_EVT_SSR_UP:
@@ -417,6 +417,13 @@ static int lpass_cdc_va_macro_swr_pwr_event(struct snd_soc_dapm_widget *w,
 					 &va_priv, __func__))
 		return -EINVAL;
 
+	/**
+	 * no need to switch to va_core_clk if va is chosen to
+	 * run based off tx_core_clk
+	 */
+	if (va_priv->clk_id == TX_CORE_CLK)
+		return 0;
+
 	dev_dbg(va_dev, "%s: event = %d, lpi_enable = %d\n",
 		__func__, event, va_priv->lpi_enable);
 
@@ -559,16 +566,10 @@ static int lpass_cdc_va_macro_mclk_event(struct snd_soc_dapm_widget *w,
 		if (!ret)
 			va_priv->dapm_tx_clk_status++;
 
-		if (va_priv->lpi_enable)
-			ret = lpass_cdc_va_macro_mclk_enable(va_priv, 1, true);
-		else
-			ret = lpass_cdc_tx_mclk_enable(component, 1);
+		ret = lpass_cdc_va_macro_mclk_enable(va_priv, 1, true);
 		break;
 	case SND_SOC_DAPM_POST_PMD:
-		if (va_priv->lpi_enable)
-			lpass_cdc_va_macro_mclk_enable(va_priv, 0, true);
-		else
-			lpass_cdc_tx_mclk_enable(component, 0);
+		lpass_cdc_va_macro_mclk_enable(va_priv, 0, true);
 
 		if (va_priv->dapm_tx_clk_status > 0) {
 			lpass_cdc_clk_rsc_request_clock(va_priv->dev,
@@ -2479,9 +2480,9 @@ static int lpass_cdc_va_macro_probe(struct platform_device *pdev)
 	if (ret) {
 		dev_err(&pdev->dev, "%s: could not find %s entry in dt\n",
 			__func__, "qcom,default-clk-id");
-		default_clk_id = VA_CORE_CLK;
+		default_clk_id = TX_CORE_CLK;
 	}
-	va_priv->clk_id = VA_CORE_CLK;
+	va_priv->clk_id = TX_CORE_CLK;
 	va_priv->default_clk_id = default_clk_id;
 	va_priv->current_clk_id = TX_CORE_CLK;
 

asoc/msm_common.c

@@ -74,6 +74,8 @@ struct chmap_pdata {
 #define MAX_USR_INPUT 10
 
 static int qos_vote_status;
+static bool lpi_pcm_logging_enable;
+
 static struct dev_pm_qos_request latency_pm_qos_req; /* pm_qos request */
 static unsigned int qos_client_active_cnt;
 /* set audio task affinity to core 1 & 2 */
@@ -966,13 +968,34 @@ static int msm_qos_ctl_get(struct snd_kcontrol *kcontrol,
 	return 0;
 }
 
+static int msm_lpi_logging_enable_put(struct snd_kcontrol *kcontrol,
+		struct snd_ctl_elem_value *ucontrol)
+{
+	lpi_pcm_logging_enable = ucontrol->value.integer.value[0];
+	pr_debug("%s: lpi pcm logging enable: %d", __func__,
+			lpi_pcm_logging_enable);
+
+	audio_prm_set_lpi_logging_status((int)lpi_pcm_logging_enable);
+
+	return 0;
+}
+
+static int msm_lpi_logging_enable_get(struct snd_kcontrol *kcontrol,
+		struct snd_ctl_elem_value *ucontrol)
+{
+	ucontrol->value.integer.value[0] = lpi_pcm_logging_enable;
+	return 0;
+}
+
 static const char *const qos_text[] = {"Disable", "Enable"};
 
 static SOC_ENUM_SINGLE_EXT_DECL(qos_vote, qos_text);
 
-static const struct snd_kcontrol_new card_pm_qos_controls[] = {
+static const struct snd_kcontrol_new card_mixer_controls[] = {
 	SOC_ENUM_EXT("PM_QOS Vote", qos_vote,
 			msm_qos_ctl_get, msm_qos_ctl_put),
+	SOC_SINGLE_EXT("LPI PCM Logging Enable", 0, 0, 1, 0,
+			msm_lpi_logging_enable_get, msm_lpi_logging_enable_put),
 };
 
 static int msm_register_pm_qos_latency_controls(struct snd_soc_pcm_runtime *rtd)
@@ -988,7 +1011,7 @@ static int msm_register_pm_qos_latency_controls(struct snd_soc_pcm_runtime *rtd)
 	}
 
 	ret = snd_soc_add_component_controls(lpass_cdc_component,
-			card_pm_qos_controls, ARRAY_SIZE(card_pm_qos_controls));
+			card_mixer_controls, ARRAY_SIZE(card_mixer_controls));
 	if (ret < 0) {
 		pr_err("%s: add common snd controls failed: %d\n",
 				__func__, ret);

dsp/audio_prm.c

@@ -29,6 +29,7 @@ struct audio_prm {
 	bool resp_received;
 	atomic_t state;
 	atomic_t status;
+	int lpi_pcm_logging_enable;
 	bool is_adsp_up;
 };
 
@@ -135,6 +136,12 @@ static int prm_gpr_send_pkt(struct gpr_pkt *pkt, wait_queue_head_t *wait)
 	return ret;
 }
 
+void audio_prm_set_lpi_logging_status(int lpi_pcm_logging_enable)
+{
+	g_prm.lpi_pcm_logging_enable = lpi_pcm_logging_enable;
+}
+EXPORT_SYMBOL(audio_prm_set_lpi_logging_status);
+
 /**
  */
 int audio_prm_set_lpass_hw_core_req(struct clk_cfg *cfg, uint32_t hw_core_id, uint8_t enable)
@@ -236,7 +243,18 @@ static int audio_prm_set_lpass_clk_cfg_req(struct clk_cfg *cfg)
 	prm_rsc_request.clock_ids_t[0].clock_id = cfg->clk_id;
 	prm_rsc_request.clock_ids_t[0].clock_freq = cfg->clk_freq_in_hz;
 	prm_rsc_request.clock_ids_t[0].clock_attri = cfg->clk_attri;
-	prm_rsc_request.clock_ids_t[0].clock_root = cfg->clk_root;
+	/*
+	 * Set TX RCG to RCO if lpi pcm logging is enabled and any one of the
+	 * tx core clocks are enabled
+	 */
+	if (g_prm.lpi_pcm_logging_enable &&
+		((cfg->clk_id == CLOCK_ID_TX_CORE_MCLK) ||
+		 (cfg->clk_id == CLOCK_ID_WSA_CORE_TX_MCLK) ||
+		 (cfg->clk_id == CLOCK_ID_WSA2_CORE_TX_MCLK) ||
+		 (cfg->clk_id == CLOCK_ID_RX_CORE_TX_MCLK)))
+		prm_rsc_request.clock_ids_t[0].clock_root = CLOCK_ROOT_SRC_RCO;
+	else
+		prm_rsc_request.clock_ids_t[0].clock_root = cfg->clk_root;
 
 	memcpy(&pkt->payload, &prm_rsc_request, sizeof(prm_cmd_request_rsc_t));
 

include/dsp/audio_prm.h

@@ -530,6 +530,18 @@ struct prm_earpa_hw_intf_config {
 
 #define CLOCK_ID_VA_CORE_MCLK 0x307
 
+/** Clock ID for MCLK for TX */
+#define CLOCK_ID_TX_CORE_MCLK 0x30C
+
+/** Clock ID for RX Core TX MCLK */
+#define CLOCK_ID_RX_CORE_TX_MCLK 0x312
+
+/** Clock ID for WSA core TX MCLK */
+#define CLOCK_ID_WSA_CORE_TX_MCLK 0x314
+
+/** Clock ID for WSA2 core TX MCLK */
+#define CLOCK_ID_WSA2_CORE_TX_MCLK 0x316
+
 /** Clock ID for the primary SPDIF output core. */
 
 #define CLOCK_ID_PRI_SPDIF_OUTPUT_CORE 0x400
@@ -578,9 +590,17 @@ struct prm_earpa_hw_intf_config {
 /** Hardware core identifier for digital codec. */
 #define HW_CORE_ID_DCODEC 0x2
 
+/** Default clock source. */
+#define CLOCK_ROOT_SRC_DEFAULT 0x0
+
+/** Xo Clock source. */
+#define CLOCK_ROOT_SRC_XO 0x1
+
+/** RCO Clock source. */
+#define CLOCK_ROOT_SRC_RCO 0x2
 int audio_prm_set_lpass_clk_cfg(struct clk_cfg *cfg, uint8_t enable);
 int audio_prm_set_lpass_hw_core_req(struct clk_cfg *cfg, uint32_t hw_core_id, uint8_t enable);
 int audio_prm_set_cdc_earpa_duty_cycling_req(struct prm_earpa_hw_intf_config *earpa_config,
 									uint32_t enable);
-
+void audio_prm_set_lpi_logging_status(int lpi_pcm_logging_enable);
 #endif