asoc: bolero: Fix wsa playback mute issue

Update volatile registers list of bolero
VA and WSA macros. Fix sequence for wsa mute
and register access in regmap read/write.

Change-Id: I7984f7e2309933536f3855f6fd4a2e2fd1c4d13b
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
2018-07-17 23:47:17 +05:30
父節點 8a3699b9ac
當前提交 0c85700fdb
共有 3 個文件被更改,包括 38 次插入10 次删除

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@@ -794,7 +794,31 @@ static bool bolero_is_writeable_register(struct device *dev,
static bool bolero_is_volatile_register(struct device *dev,
unsigned int reg)
{
return true;
/* Update volatile list for rx/tx macros */
switch (reg) {
case BOLERO_CDC_VA_TOP_CSR_CORE_ID_0:
case BOLERO_CDC_VA_TOP_CSR_CORE_ID_1:
case BOLERO_CDC_VA_TOP_CSR_CORE_ID_2:
case BOLERO_CDC_VA_TOP_CSR_CORE_ID_3:
case BOLERO_CDC_WSA_VBAT_BCL_VBAT_GAIN_MON_VAL:
case BOLERO_CDC_WSA_VBAT_BCL_VBAT_DECODE_ST:
case BOLERO_CDC_WSA_INTR_CTRL_PIN1_STATUS0:
case BOLERO_CDC_WSA_INTR_CTRL_PIN2_STATUS0:
case BOLERO_CDC_WSA_COMPANDER0_CTL6:
case BOLERO_CDC_WSA_COMPANDER1_CTL6:
case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMIN_CNTR_LSB:
case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMIN_CNTR_MSB:
case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMAX_CNTR_LSB:
case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FMAX_CNTR_MSB:
case BOLERO_CDC_WSA_SPLINE_ASRC0_STATUS_FIFO:
case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMIN_CNTR_LSB:
case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMIN_CNTR_MSB:
case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_LSB:
case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_MSB:
case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FIFO:
return true;
}
return false;
}
const struct regmap_config bolero_regmap_config = {