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msm: camera: isp: Add Support for XCFA RDI requirements

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For SFE 780, Input to SFE from CSID for single xcfa use cases
is RDI0.
This commit changes the acquire logic to acquire RDI0
in case of SFE context for single ISP/SFE use cases and IPP
for dual ife cases.

CRs-Fixed: 3092119
Change-Id: I7e7ba0438435c6fe7a8b0d22f7c08b7ce4da1819
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
This commit is contained in:
Gaurav Jindal
2021-11-01 10:29:30 +05:30
committed by Camera Software Integration
parent 910867ce20
commit 0bd0f23d03
6 changed files with 227 additions and 91 deletions
Download Patch File Download Diff File Expand all files Collapse all files

266
drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c
View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/slab.h>
@@ -89,6 +90,10 @@ static bool cam_isp_is_ctx_primary_rdi(struct cam_ife_hw_mgr_ctx *ctx)
return false;
}
static enum cam_ife_pix_path_res_id
cam_ife_hw_mgr_get_ife_csid_rdi_res_type(
uint32_t out_port_type);
static int cam_ife_mgr_finish_clk_bw_update(
struct cam_ife_hw_mgr_ctx *ctx,
uint64_t request_id, bool skip_clk_data_rst)
@@ -770,10 +775,12 @@ static int cam_ife_mgr_csid_start_hw(
struct cam_isp_hw_mgr_res *hw_mgr_res;
struct cam_isp_resource_node *isp_res;
struct cam_isp_resource_node *res[CAM_IFE_PIX_PATH_RES_MAX - 1];
struct cam_isp_resource_node *primary_rdi_res = NULL;
struct cam_csid_hw_start_args start_args;
struct cam_hw_intf *hw_intf;
uint32_t cnt;
int j;
bool ipp_available = false;
for (j = ctx->num_base - 1 ; j >= 0; j--) {
cnt = 0;
@@ -787,10 +794,13 @@ static int cam_ife_mgr_csid_start_hw(
if (!isp_res || ctx->base[j].idx != isp_res->hw_intf->hw_idx)
continue;
if (primary_rdi_csid_res == hw_mgr_res->res_id) {
hw_mgr_res->hw_res[0]->is_rdi_primary_res =
cam_isp_is_ctx_primary_rdi(ctx);
}
if ((primary_rdi_csid_res == hw_mgr_res->res_id) ||
(ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE &&
isp_res->res_id == CAM_IFE_PIX_PATH_RES_RDI_0))
primary_rdi_res = isp_res;
if (hw_mgr_res->res_id == CAM_IFE_PIX_PATH_RES_IPP)
ipp_available = true;
CAM_DBG(CAM_ISP, "csid[%u] res:%s res_id %d cnt %u",
isp_res->hw_intf->hw_idx,
@@ -799,6 +809,9 @@ static int cam_ife_mgr_csid_start_hw(
cnt++;
}
if (!ipp_available && primary_rdi_res)
primary_rdi_res->is_rdi_primary_res = true;
if (cnt) {
hw_intf = res[0]->hw_intf;
start_args.num_res = cnt;
@@ -2443,15 +2456,37 @@ err:
return rc;
}
static bool cam_ife_hw_mgr_is_csid_rdi_sfe_rdi_out(
struct cam_isp_in_port_generic_info *in_port,
uint32_t res_id)
{
struct cam_isp_out_port_generic_info *out_port;
uint32_t i = 0;
for (i = 0; i < in_port->num_out_res; i++) {
out_port = &in_port->data[i];
if (res_id == cam_ife_hw_mgr_get_ife_csid_rdi_res_type(
out_port->res_type))
return true;
}
return false;
}
static int cam_ife_hw_mgr_acquire_res_sfe_src(
struct cam_ife_hw_mgr_ctx *ife_ctx,
struct cam_isp_in_port_generic_info *in_port)
{
int rc = -1;
int rc = -1;
struct cam_sfe_acquire_args sfe_acquire;
struct cam_isp_hw_mgr_res *csid_res;
bool is_rdi = false;
long sfe_required_res = 0;
uint32_t sfe_acquired_res = 0;
uint32_t sfe_res_id = 0;
struct cam_ife_hw_mgr *hw_mgr;
struct cam_isp_hw_mgr_res *csid_res_map[CAM_ISP_HW_SFE_IN_MAX];
hw_mgr = ife_ctx->hw_mgr;
list_for_each_entry(csid_res, &ife_ctx->res_list_ife_csid, list) {
if (csid_res->num_children)
continue;
@@ -2461,48 +2496,88 @@ static int cam_ife_hw_mgr_acquire_res_sfe_src(
switch (csid_res->res_id) {
case CAM_IFE_PIX_PATH_RES_IPP:
sfe_acquire.sfe_in.res_id = CAM_ISP_HW_SFE_IN_PIX;
is_rdi = false;
break;
sfe_required_res |= BIT(CAM_ISP_HW_SFE_IN_PIX);
sfe_res_id = CAM_ISP_HW_SFE_IN_PIX;
csid_res_map[sfe_res_id] = csid_res;
continue;
case CAM_IFE_PIX_PATH_RES_RDI_0:
sfe_acquire.sfe_in.res_id = CAM_ISP_HW_SFE_IN_RDI0;
is_rdi = true;
sfe_res_id = CAM_ISP_HW_SFE_IN_RDI0;
break;
case CAM_IFE_PIX_PATH_RES_RDI_1:
sfe_acquire.sfe_in.res_id = CAM_ISP_HW_SFE_IN_RDI1;
is_rdi = true;
sfe_res_id = CAM_ISP_HW_SFE_IN_RDI1;
break;
case CAM_IFE_PIX_PATH_RES_RDI_2:
sfe_acquire.sfe_in.res_id = CAM_ISP_HW_SFE_IN_RDI2;
is_rdi = true;
sfe_res_id = CAM_ISP_HW_SFE_IN_RDI2;
break;
case CAM_IFE_PIX_PATH_RES_RDI_3:
sfe_acquire.sfe_in.res_id = CAM_ISP_HW_SFE_IN_RDI3;
is_rdi = true;
sfe_res_id = CAM_ISP_HW_SFE_IN_RDI3;
break;
case CAM_IFE_PIX_PATH_RES_RDI_4:
sfe_acquire.sfe_in.res_id = CAM_ISP_HW_SFE_IN_RDI4;
is_rdi = true;
sfe_res_id = CAM_ISP_HW_SFE_IN_RDI4;
break;
default:
CAM_ERR(CAM_ISP,
"Wrong CSID Path Resource ID: %u",
csid_res->res_id);
goto err;
}
rc = cam_ife_hw_mgr_acquire_res_sfe_src_util(ife_ctx, in_port, csid_res,
&sfe_acquire, is_rdi);
if (rc) {
CAM_ERR(CAM_ISP, "Acquire SFE failed ctx: %u res: %u",
ife_ctx->ctx_index, csid_res->res_id);
goto err;
/*
* We acquire RDI only if RDI out is available, this will take
* care of cases where CSID RDI goes to SFE PIX
*/
if (cam_ife_hw_mgr_is_csid_rdi_sfe_rdi_out(in_port, csid_res->res_id)) {
sfe_required_res |= BIT(sfe_res_id);
csid_res_map[sfe_res_id] = csid_res;
}
/*
* We need PIX resource without CSID IPP for following cases:
* 1. No read count
* 2. Dynamic switch from SHDR-->HDR and HDR-->SHDR is possible
*/
if ((!(sfe_required_res & BIT(CAM_ISP_HW_SFE_IN_PIX))) &&
(!in_port->ife_rd_count || in_port->dynamic_hdr_switch_en) &&
(BIT(csid_res->res_id) == hw_mgr->csid_hw_caps[0].sfe_ipp_input_rdi_res)) {
sfe_required_res |= BIT(CAM_ISP_HW_SFE_IN_PIX);
csid_res_map[CAM_ISP_HW_SFE_IN_PIX] = csid_res;
}
}
CAM_DBG(CAM_ISP, "ctx: %u Required SFE in resources: 0x%x", ife_ctx->ctx_index,
sfe_required_res);
while (sfe_required_res) {
sfe_res_id = ffs(sfe_required_res) - 1;
clear_bit(sfe_res_id, &sfe_required_res);
switch (sfe_res_id) {
case CAM_ISP_HW_SFE_IN_PIX:
is_rdi = false;
break;
case CAM_ISP_HW_SFE_IN_RDI0:
case CAM_ISP_HW_SFE_IN_RDI1:
case CAM_ISP_HW_SFE_IN_RDI2:
case CAM_ISP_HW_SFE_IN_RDI3:
case CAM_ISP_HW_SFE_IN_RDI4:
is_rdi = true;
break;
default:
CAM_ERR(CAM_ISP, "Wrong CSID Path Resource ID: %u", sfe_res_id);
goto err;
}
sfe_acquire.sfe_in.res_id = sfe_res_id;
rc = cam_ife_hw_mgr_acquire_res_sfe_src_util(ife_ctx, in_port,
csid_res_map[sfe_res_id], &sfe_acquire, is_rdi);
if (rc)
goto err;
sfe_acquired_res |= sfe_res_id;
}
CAM_DBG(CAM_ISP, "ctx: %u Acquired SFE in resources: 0x%x", ife_ctx->ctx_index,
sfe_acquired_res);
return 0;
err:
CAM_ERR(CAM_ISP, "Acquire SFE failed ctx: %u acquired_res 0x%x sfe_res %u",
ife_ctx->ctx_index, sfe_acquired_res, sfe_res_id);
return rc;
}
@@ -3120,13 +3195,12 @@ static int cam_ife_hw_mgr_acquire_csid_hw(
ife_hw_mgr = ife_ctx->hw_mgr;
if (ife_ctx->flags.is_rdi_only_context)
csid_acquire->can_use_lite = true;
if (in_port->num_out_res)
out_port = &(in_port->data[0]);
ife_ctx->flags.is_dual = (bool)in_port->usage_type;
can_use_lite = cam_ife_mgr_check_can_use_lite(
if (ife_ctx->ctx_type != CAM_IFE_CTX_TYPE_SFE)
can_use_lite = cam_ife_mgr_check_can_use_lite(
csid_acquire, ife_ctx);
/* Try acquiring CSID from previously acquired HW */
@@ -3219,7 +3293,9 @@ static cam_ife_hw_mgr_is_need_csid_ipp(
if (!(in_port->ipp_count || in_port->lcr_count))
need = false;
else if (ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE && in_port->ife_rd_count)
else if (ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE &&
((hw_mgr->csid_hw_caps[0].sfe_ipp_input_rdi_res && !in_port->usage_type) ||
in_port->ife_rd_count))
need = false;
CAM_DBG(CAM_ISP, "Need CSID PIX %u, Ctx_type: %u", need, ife_ctx->ctx_type);
@@ -3439,42 +3515,42 @@ static int cam_ife_hw_mgr_acquire_csid_rdi_util(
if (ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE)
csid_acquire.sfe_en = true;
if (cam_ife_hw_mgr_is_shdr_fs_rdi_res(
out_port->res_type,
ife_ctx->flags.is_sfe_shdr, ife_ctx->flags.is_sfe_fs)) {
CAM_DBG(CAM_ISP, "setting inline shdr mode for res: 0x%x",
out_port->res_type);
csid_acquire.sfe_inline_shdr = true;
/*
* Merged output will only be from the first n RDIs
* starting from RDI0. Any other RDI[1:2] resource
* if only being dumped will be considered as a
* no merge resource
*/
if (ife_ctx->flags.is_aeb_mode) {
if ((out_port->res_type - CAM_ISP_SFE_OUT_RES_RDI_0) >=
ife_ctx->sfe_info.num_fetches) {
csid_acquire.sec_evt_config.en_secondary_evt = true;
csid_acquire.sec_evt_config.evt_type = CAM_IFE_CSID_EVT_SOF;
CAM_DBG(CAM_ISP,
"Secondary SOF evt enabled for path: 0x%x",
if (out_port) {
if (cam_ife_hw_mgr_is_shdr_fs_rdi_res(out_port->res_type,
ife_ctx->flags.is_sfe_shdr, ife_ctx->flags.is_sfe_fs)) {
CAM_DBG(CAM_ISP, "setting inline shdr mode for res: 0x%x",
out_port->res_type);
}
csid_acquire.sfe_inline_shdr = true;
/*
* Merged output will only be from the first n RDIs
* starting from RDI0. Any other RDI[1:2] resource
* if only being dumped will be considered as a
* no merge resource
*/
if (ife_ctx->flags.is_aeb_mode) {
if ((out_port->res_type - CAM_ISP_SFE_OUT_RES_RDI_0) >=
ife_ctx->sfe_info.num_fetches) {
csid_acquire.sec_evt_config.en_secondary_evt = true;
csid_acquire.sec_evt_config.evt_type = CAM_IFE_CSID_EVT_SOF;
CAM_DBG(CAM_ISP,
"Secondary SOF evt enabled for path: 0x%x",
out_port->res_type);
}
/* Enable EPOCH/SYNC frame drop for error monitoring on master */
if (out_port->res_type == CAM_ISP_SFE_OUT_RES_RDI_0) {
csid_acquire.sec_evt_config.en_secondary_evt = true;
csid_acquire.sec_evt_config.evt_type =
CAM_IFE_CSID_EVT_EPOCH |
CAM_IFE_CSID_EVT_SENSOR_SYNC_FRAME_DROP;
CAM_DBG(CAM_ISP,
"Secondary EPOCH & frame drop evt enabled for path: 0x%x",
out_port->res_type);
/* Enable EPOCH/SYNC frame drop for error monitoring on master */
if (out_port->res_type == CAM_ISP_SFE_OUT_RES_RDI_0) {
csid_acquire.sec_evt_config.en_secondary_evt = true;
csid_acquire.sec_evt_config.evt_type =
CAM_IFE_CSID_EVT_EPOCH |
CAM_IFE_CSID_EVT_SENSOR_SYNC_FRAME_DROP;
CAM_DBG(CAM_ISP,
"Secondary EPOCH & frame drop evt enabled for path: 0x%x",
out_port->res_type);
}
}
}
csid_res->is_secure = out_port->secure_mode;
}
csid_res->is_secure = out_port->secure_mode;
if (in_port->usage_type)
csid_acquire.sync_mode = CAM_ISP_HW_SYNC_MASTER;
@@ -3529,15 +3605,47 @@ end:
}
static int cam_ife_hw_mgr_get_csid_rdi_for_sfe_ipp_input(
struct cam_ife_hw_mgr_ctx *ife_ctx,
struct cam_isp_in_port_generic_info *in_port,
uint32_t acquired_rdi_res,
uint32_t *acquired_hw_path)
{
struct cam_ife_hw_mgr *hw_mgr;
uint32_t res_id = CAM_IFE_PIX_PATH_RES_MAX;
int rc = 0;
hw_mgr = ife_ctx->hw_mgr;
if (hw_mgr->csid_hw_caps[0].sfe_ipp_input_rdi_res && !in_port->usage_type)
res_id = ffs(hw_mgr->csid_hw_caps[0].sfe_ipp_input_rdi_res) - 1;
if ((res_id != CAM_IFE_PIX_PATH_RES_MAX) && (!(BIT(res_id) & acquired_rdi_res))) {
rc = cam_ife_hw_mgr_acquire_csid_rdi_util(ife_ctx,
in_port, res_id, NULL, acquired_hw_path);
if (rc) {
CAM_ERR(CAM_ISP, "Acquire RDI Ctx: %d rdi:%d rc %d",
ife_ctx->ctx_index, res_id, rc);
goto end;
}
}
CAM_DBG(CAM_ISP, "Ctx: %d rdi_res:%d ctx_type %d rc %d", ife_ctx->ctx_index,
res_id, ife_ctx->ctx_type, rc);
end:
return rc;
}
static int cam_ife_hw_mgr_acquire_res_ife_csid_rdi(
struct cam_ife_hw_mgr_ctx *ife_ctx,
struct cam_isp_in_port_generic_info *in_port,
uint32_t *acquired_hw_path)
uint32_t *acquired_hw_path,
uint32_t *acquired_rdi_res)
{
int rc = 0;
int i;
struct cam_isp_out_port_generic_info *out_port = NULL;
enum cam_ife_pix_path_res_id res_id;
enum cam_ife_pix_path_res_id res_id = CAM_IFE_PIX_PATH_RES_MAX;
for (i = 0; i < in_port->num_out_res; i++) {
out_port = &in_port->data[i];
@@ -3548,10 +3656,14 @@ static int cam_ife_hw_mgr_acquire_res_ife_csid_rdi(
rc = cam_ife_hw_mgr_acquire_csid_rdi_util(ife_ctx,
in_port, res_id, out_port, acquired_hw_path);
if (rc) {
CAM_ERR(CAM_ISP, "Res %d acquire failed rc %d", res_id, rc);
CAM_ERR(CAM_ISP, "Ctx: %d Res %d acquire failed rc %d",
ife_ctx->ctx_index, res_id, rc);
break;
}
*acquired_rdi_res |= BIT(res_id);
}
CAM_DBG(CAM_ISP, "Ctx: %d rdi: %d", ife_ctx->ctx_index, res_id);
return rc;
}
@@ -4288,6 +4400,7 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
int rc = -1;
int is_dual_isp = 0;
bool crop_enable = true;
uint32_t acquired_rdi_res = 0;
is_dual_isp = in_port->usage_type;
ife_ctx->flags.dsp_enabled = (bool)in_port->dsp_mode;
@@ -4361,7 +4474,7 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
if (in_port->rdi_count) {
/* get ife csid RDI resource */
rc = cam_ife_hw_mgr_acquire_res_ife_csid_rdi(ife_ctx, in_port,
acquired_hw_path);
acquired_hw_path, &acquired_rdi_res);
if (rc) {
CAM_ERR(CAM_ISP,
"Acquire IFE CSID RDI resource Failed");
@@ -4369,6 +4482,20 @@ static int cam_ife_mgr_acquire_hw_for_ctx(
}
}
/* try acquire RDI for SFE cases without RDI out ports,
* this is specifically for targets having RDI as input
* to SFE IPP
*/
if (ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE) {
rc = cam_ife_hw_mgr_get_csid_rdi_for_sfe_ipp_input(ife_ctx, in_port,
acquired_rdi_res, acquired_hw_path);
if (rc) {
CAM_ERR(CAM_ISP, "Acquire RDI for SFE IPP failed Ctx: %d rc %d",
ife_ctx->ctx_index, rc);
goto err;
}
}
/* acquire SFE input resource */
if ((ife_ctx->ctx_type == CAM_IFE_CTX_TYPE_SFE) &&
(in_port->ipp_count || in_port->rdi_count)) {
@@ -4618,6 +4745,7 @@ static inline void cam_ife_mgr_acquire_get_feature_flag_params(
in_port->sfe_binned_epoch_cfg = in->feature_flag & CAM_ISP_SFE_BINNED_EPOCH_CFG_ENABLE;
in_port->epd_supported = in->feature_flag & CAM_ISP_EPD_SUPPORT;
in_port->aeb_mode = in->feature_flag & CAM_ISP_AEB_MODE_EN;
in_port->dynamic_hdr_switch_en = in->feature_flag & CAM_ISP_HDR_MODE_DYNAMIC_SWITCH_EN;
}
static int cam_ife_mgr_acquire_get_unified_structure_v2(

3
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid780.h
View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _CAM_IFE_CSID_780_H_
@@ -678,6 +679,7 @@ static struct cam_ife_csid_ver2_path_reg_info
.epoch1_shift_val = 0,
.pix_store_en_shift_val = 10,
.sof_retiming_dis_shift = 5,
.default_out_format = CAM_FORMAT_PLAIN16_16,
};
static struct cam_ife_csid_ver2_path_reg_info
@@ -1244,6 +1246,7 @@ static struct cam_ife_csid_ver2_common_reg_info
.top_buf_done_irq_mask = 0x2000,
.decode_format_payload_only = 0xF,
.timestamp_enabled_in_cfg0 = true,
.sfe_ipp_input_rdi_res = BIT(CAM_IFE_PIX_PATH_RES_RDI_0),
};
static struct cam_ife_csid_ver2_top_reg_info

17
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c
View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/iopoll.h>
@@ -1917,6 +1918,7 @@ int cam_ife_csid_ver2_get_hw_caps(void *hw_priv,
hw_caps->rup_en = csid_reg->cmn_reg->rup_supported;
hw_caps->only_master_rup = csid_reg->cmn_reg->only_master_rup;
hw_caps->is_lite = soc_private->is_ife_csid_lite;
hw_caps->sfe_ipp_input_rdi_res = csid_reg->cmn_reg->sfe_ipp_input_rdi_res;
CAM_DBG(CAM_ISP,
"CSID:%d num-rdis:%d, num-pix:%d, major:%d minor:%d ver:%d",
@@ -2256,7 +2258,6 @@ static int cam_ife_csid_hw_ver2_config_path_data(
path_cfg->in_format[i] = reserve->in_port->format[i];
path_cfg->cid = cid;
path_cfg->out_format = reserve->out_port->format;
path_cfg->sync_mode = reserve->sync_mode;
path_cfg->height = reserve->in_port->height;
path_cfg->start_line = reserve->in_port->line_start;
@@ -2271,6 +2272,11 @@ static int cam_ife_csid_hw_ver2_config_path_data(
path_cfg->sec_evt_config.evt_type = reserve->sec_evt_config.evt_type;
path_reg = csid_reg->path_reg[res->res_id];
if (reserve->out_port)
path_cfg->out_format = reserve->out_port->format;
else
path_cfg->out_format = path_reg->default_out_format;
if (reserve->sync_mode == CAM_ISP_HW_SYNC_MASTER) {
path_cfg->start_pixel = reserve->in_port->left_start;
path_cfg->end_pixel = reserve->in_port->left_stop;
@@ -3248,13 +3254,6 @@ static int cam_ife_csid_ver2_program_rdi_path(
val = csid_hw->debug_info.path_mask;
if (res->is_rdi_primary_res) {
path_cfg->handle_camif_irq = true;
val |= path_reg->camif_irq_mask;
}
if ((csid_hw->flags.offline_mode ||
path_cfg->sfe_shdr) &&
(res->res_id == CAM_IFE_PIX_PATH_RES_RDI_0)) {
val |= path_reg->camif_irq_mask;
path_cfg->handle_camif_irq = true;
}
@@ -3273,7 +3272,6 @@ static int cam_ife_csid_ver2_program_rdi_path(
}
res->res_state = CAM_ISP_RESOURCE_STATE_STREAMING;
path_cfg->irq_reg_idx =
cam_ife_csid_convert_res_to_irq_reg(res->res_id);
@@ -3402,6 +3400,7 @@ static int cam_ife_csid_ver2_program_ipp_path(
if (path_cfg->sync_mode == CAM_ISP_HW_SYNC_NONE ||
path_cfg->sync_mode == CAM_ISP_HW_SYNC_MASTER) {
val |= path_reg->camif_irq_mask;
path_cfg->handle_camif_irq = true;
}
irq_mask[CAM_IFE_CSID_IRQ_REG_TOP] = path_reg->top_irq_mask;

3
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.h
View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _CAM_IFE_CSID_HW_VER2_H_
@@ -355,6 +356,7 @@ struct cam_ife_csid_ver2_path_reg_info {
uint32_t epoch1_shift_val;
uint32_t sof_retiming_dis_shift;
uint32_t capabilities;
uint32_t default_out_format;
};
struct cam_ife_csid_ver2_common_reg_info {
@@ -459,6 +461,7 @@ struct cam_ife_csid_ver2_common_reg_info {
uint32_t global_reset;
uint32_t rup_supported;
uint32_t only_master_rup;
uint32_t sfe_ipp_input_rdi_res;
bool timestamp_enabled_in_cfg0;
/* Masks */

27
drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_ife_csid_hw_intf.h
View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef _CAM_CSID_HW_INTF_H_
@@ -66,16 +67,17 @@ enum cam_ife_csid_secondary_evt_type {
/**
* struct cam_ife_csid_hw_caps- get the CSID hw capability
* @num_rdis: number of rdis supported by CSID HW device
* @num_pix: number of pxl paths supported by CSID HW device
* @num_ppp: number of ppp paths supported by CSID HW device
* @major_version : major version
* @minor_version: minor version
* @version_incr: version increment
* @is_lite: is the ife_csid lite
* @global_reset_en: flag to indicate if global reset is enabled
* @rup_en: flag to indicate if rup is on csid side
* @only_master_rup: flag to indicate if only master RUP
* @num_rdis: number of rdis supported by CSID HW device
* @num_pix: number of pxl paths supported by CSID HW device
* @num_ppp: number of ppp paths supported by CSID HW device
* @major_version : major version
* @minor_version: minor version
* @version_incr: version increment
* @sfe_ipp_input_rdi_res: RDI Res as an input to SFE
* @is_lite: is the ife_csid lite
* @global_reset_en: flag to indicate if global reset is enabled
* @rup_en: flag to indicate if rup is on csid side
* @only_master_rup: flag to indicate if only master RUP
*/
struct cam_ife_csid_hw_caps {
uint32_t num_rdis;
@@ -84,6 +86,7 @@ struct cam_ife_csid_hw_caps {
uint32_t major_version;
uint32_t minor_version;
uint32_t version_incr;
uint32_t sfe_ipp_input_rdi_res;
bool is_lite;
bool global_reset_en;
bool rup_en;
@@ -150,6 +153,7 @@ struct cam_isp_in_port_generic_info {
bool sfe_binned_epoch_cfg;
bool epd_supported;
bool aeb_mode;
bool dynamic_hdr_switch_en;
struct cam_isp_out_port_generic_info *data;
};
@@ -194,8 +198,6 @@ struct cam_csid_secondary_evt_config {
* @event_cb: Callback function to hw mgr in case of hw events
* @phy_sel: Phy selection number if tpg is enabled from userspace
* @cb_priv: Private pointer to return to callback
* @can_use_lite: Flag to indicate if current call qualifies for
* acquire lite
* @sfe_en: Flag to indicate if SFE is enabled
* @use_wm_pack: [OUT]Flag to indicate if WM packing is to be used for packing
*
@@ -221,7 +223,6 @@ struct cam_csid_hw_reserve_resource_args {
cam_hw_mgr_event_cb_func event_cb;
uint32_t phy_sel;
void *cb_priv;
bool can_use_lite;
bool sfe_en;
bool use_wm_pack;
};

2
include/uapi/camera/media/cam_isp.h
View File

@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#ifndef __UAPI_CAM_ISP_H__
@@ -179,6 +180,7 @@
#define CAM_ISP_SFE_FS_MODE_EN BIT(5)
#define CAM_ISP_SFE_SHDR_MODE_EN BIT(6)
#define CAM_ISP_AEB_MODE_EN BIT(7)
#define CAM_ISP_HDR_MODE_DYNAMIC_SWITCH_EN BIT(8)
/* ISP core cfg flag params */
#define CAM_ISP_PARAM_CORE_CFG_HDR_MUX_SEL BIT(0)