disp: msm: dp: update dp phy settings for waipio

This change updates the DP PHY swing/preemphasis values
for Waipio.

Change-Id: I52d6b461f10f5680d62e26ff3f5978e9b90fc0b1
Signed-off-by: Sudarsan Ramesh <[email protected]>

msm/dp/dp_catalog_v420.c

@@ -65,10 +65,10 @@ static u8 const dp_swing_hbr2_hbr3[MAX_VOLTAGE_LEVELS][MAX_PRE_EMP_LEVELS] = {
 };
 
 static u8 const dp_pre_emp_hbr_rbr[MAX_VOLTAGE_LEVELS][MAX_PRE_EMP_LEVELS] = {
-	{0x00, 0x0E, 0x15, 0x1B}, /* pe0, 0 db */
+	{0x00, 0x0D, 0x14, 0x1A}, /* pe0, 0 db */
 	{0x00, 0x0E, 0x15, 0xFF}, /* pe1, 3.5 db */
 	{0x00, 0x0E, 0xFF, 0xFF}, /* pe2, 6.0 db */
-	{0x04, 0xFF, 0xFF, 0xFF}  /* pe3, 9.5 db */
+	{0x03, 0xFF, 0xFF, 0xFF}  /* pe3, 9.5 db */
 };
 
 static u8 const dp_swing_hbr_rbr[MAX_VOLTAGE_LEVELS][MAX_PRE_EMP_LEVELS] = {

msm/dp/dp_pll_5nm.c

@@ -314,7 +314,7 @@ static int dp_config_vco_rate_5nm(struct dp_pll *pll,
 	dp_pll_write(dp_ln_tx0, DP_TRAN_DRVR_EMP_EN, 0xf);
 	dp_pll_write(dp_ln_tx0, TXn_PARRATE_REC_DETECT_IDLE_EN, 0x00);
 	dp_pll_write(dp_ln_tx0, DP_TX_INTERFACE_MODE, 0x00);
-	dp_pll_write(dp_ln_tx0, TXn_RES_CODE_LANE_OFFSET_TX, 0x11);
+	dp_pll_write(dp_ln_tx0, TXn_RES_CODE_LANE_OFFSET_TX, 0x0A);
 	dp_pll_write(dp_ln_tx0, TXn_RES_CODE_LANE_OFFSET_RX, 0x11);
 	dp_pll_write(dp_ln_tx0, TXn_TX_BAND, 0x04);
 	/* Make sure the PLL register writes are done */
@@ -330,7 +330,7 @@ static int dp_config_vco_rate_5nm(struct dp_pll *pll,
 	dp_pll_write(dp_ln_tx1, DP_TRAN_DRVR_EMP_EN, 0xf);
 	dp_pll_write(dp_ln_tx1, TXn_PARRATE_REC_DETECT_IDLE_EN, 0x00);
 	dp_pll_write(dp_ln_tx1, DP_TX_INTERFACE_MODE, 0x00);
-	dp_pll_write(dp_ln_tx1, TXn_RES_CODE_LANE_OFFSET_TX, 0x11);
+	dp_pll_write(dp_ln_tx1, TXn_RES_CODE_LANE_OFFSET_TX, 0x0A);
 	dp_pll_write(dp_ln_tx1, TXn_RES_CODE_LANE_OFFSET_RX, 0x11);
 	dp_pll_write(dp_ln_tx1, TXn_TX_BAND, 0x04);
 	/* Make sure the PHY register writes are done */