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@@ -68,6 +68,7 @@
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#define MDP_SID_V2_LUTDMA_RD 0x300
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#define MDP_SID_V2_LUTDMA_WR 0x304
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#define MDP_SID_V2_LUTDMA_SB_RD 0x308
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+#define MDP_SID_V2_LUTDMA_VM_0 0x310
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#define MDP_SID_V2_DSI0 0x500
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#define MDP_SID_V2_DSI1 0x504
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@@ -442,6 +443,13 @@ void sde_hw_set_vm_sid_v2(struct sde_hw_sid *sid, u32 vm, struct sde_mdss_cfg *m
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SDE_REG_WRITE(&sid->hw, offset, vm << 2);
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}
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+ if (SDE_HW_MAJOR(sid->hw.hw_rev) >= SDE_HW_MAJOR(SDE_HW_VER_A00)) {
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+ for (i = 0; i < m->ctl_count; i++) {
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+ offset = MDP_SID_V2_LUTDMA_VM_0 + (i * 4);
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+ SDE_REG_WRITE(&sid->hw, offset, vm << 2);
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+ }
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+ }
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+
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SDE_REG_WRITE(&sid->hw, MDP_SID_V2_IPC_READ, vm << 2);
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SDE_REG_WRITE(&sid->hw, MDP_SID_V2_LUTDMA_RD, vm << 2);
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SDE_REG_WRITE(&sid->hw, MDP_SID_V2_LUTDMA_WR, vm << 2);
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