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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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+ * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2012-2021, The Linux Foundation. All rights reserved.
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*/
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@@ -19,6 +19,7 @@
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#define DP_KHZ_TO_HZ 1000
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#define DP_PANEL_DEFAULT_BPP 24
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#define DP_MAX_DS_PORT_COUNT 1
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+#define DP_PANEL_MAX_SUPPORTED_BPP 30
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#define DSC_TGT_BPP 8
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#define DPRX_FEATURE_ENUMERATION_LIST 0x2210
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@@ -71,6 +72,7 @@ struct dp_panel_private {
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struct dp_link *link;
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struct dp_parser *parser;
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struct dp_catalog_panel *catalog;
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+ struct dp_panel *base;
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bool panel_on;
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bool vsc_supported;
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bool vscext_supported;
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@@ -1921,13 +1923,16 @@ static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
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{
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struct dp_link_params *link_params;
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struct dp_panel_private *panel;
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- const u32 max_supported_bpp = 30;
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+ u32 max_supported_bpp = dp_panel->max_supported_bpp;
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u32 min_supported_bpp = 18;
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u32 bpp = 0, link_bitrate = 0, mode_bitrate;
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s64 rate_fp = 0;
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panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
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+ if (dp_panel->mst_state && panel->base)
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+ max_supported_bpp = panel->base->max_supported_bpp;
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+
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if (dsc_en)
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min_supported_bpp = 24;
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@@ -3155,6 +3160,8 @@ struct dp_panel *dp_panel_get(struct dp_panel_in *in)
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dp_panel->spd_enabled = true;
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dp_panel->link_bw_code = 0;
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dp_panel->lane_count = 0;
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+ dp_panel->max_supported_bpp = DP_PANEL_MAX_SUPPORTED_BPP;
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+
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memcpy(panel->spd_vendor_name, vendor_name, (sizeof(u8) * 8));
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memcpy(panel->spd_product_description, product_desc, (sizeof(u8) * 16));
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dp_panel->connector = in->connector;
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@@ -3164,6 +3171,7 @@ struct dp_panel *dp_panel_get(struct dp_panel_in *in)
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dp_panel->dsc_continuous_pps = panel->parser->dsc_continuous_pps;
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if (in->base_panel) {
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+ panel->base = in->base_panel;
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memcpy(dp_panel->dpcd, in->base_panel->dpcd,
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DP_RECEIVER_CAP_SIZE + 1);
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memcpy(dp_panel->dsc_dpcd, in->base_panel->dsc_dpcd,
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