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@@ -47,6 +47,9 @@
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#define WSA_MACRO_RX_PATH_CFG3_OFFSET 0x10
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#define WSA_MACRO_RX_PATH_DSMDEM_OFFSET 0x4C
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#define WSA_MACRO_FS_RATE_MASK 0x0F
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+#define WSA_MACRO_EC_MIX_TX0_MASK 0x03
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+#define WSA_MACRO_EC_MIX_TX1_MASK 0x18
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+
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enum {
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WSA_MACRO_RX0 = 0,
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@@ -722,6 +725,7 @@ static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
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struct snd_soc_component *component = dai->component;
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struct device *wsa_dev = NULL;
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struct wsa_macro_priv *wsa_priv = NULL;
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+ u16 val = 0, mask = 0, cnt = 0;
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if (!wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
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return -EINVAL;
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@@ -732,7 +736,6 @@ static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
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switch (dai->id) {
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case WSA_MACRO_AIF_VI:
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- case WSA_MACRO_AIF_ECHO:
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*tx_slot = wsa_priv->active_ch_mask[dai->id];
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*tx_num = wsa_priv->active_ch_cnt[dai->id];
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break;
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@@ -741,6 +744,20 @@ static int wsa_macro_get_channel_map(struct snd_soc_dai *dai,
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*rx_slot = wsa_priv->active_ch_mask[dai->id];
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*rx_num = wsa_priv->active_ch_cnt[dai->id];
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break;
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+ case WSA_MACRO_AIF_ECHO:
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+ val = snd_soc_component_read32(component,
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+ BOLERO_CDC_WSA_RX_INP_MUX_RX_MIX_CFG0);
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+ if (val & WSA_MACRO_EC_MIX_TX1_MASK) {
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+ mask |= 0x2;
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+ cnt++;
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+ }
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+ if (val & WSA_MACRO_EC_MIX_TX0_MASK) {
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+ mask |= 0x1;
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+ cnt++;
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+ }
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+ *tx_slot = mask;
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+ *tx_num = cnt;
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+ break;
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default:
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dev_err(wsa_dev, "%s: Invalid AIF\n", __func__);
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break;
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@@ -1694,10 +1711,10 @@ static int wsa_macro_enable_echo(struct snd_soc_dapm_widget *w,
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BOLERO_CDC_WSA_RX_INP_MUX_RX_MIX_CFG0,
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0x1 << ec_tx, 0x1 << ec_tx);
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ec_hq_reg = BOLERO_CDC_WSA_EC_HQ0_EC_REF_HQ_PATH_CTL +
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- 0x20 * ec_tx;
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+ 0x40 * ec_tx;
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snd_soc_component_update_bits(component, ec_hq_reg, 0x01, 0x01);
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ec_hq_reg = BOLERO_CDC_WSA_EC_HQ0_EC_REF_HQ_CFG0 +
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- 0x20 * ec_tx;
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+ 0x40 * ec_tx;
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/* default set to 48k */
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snd_soc_component_update_bits(component, ec_hq_reg, 0x1E, 0x08);
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}
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