qcacld-3.0: Abstract bus debug dump in hif layer

Remove direct call to CE debug routine from ol_fw
and hif main layer. Abstract the bus debug dump
register routines to respective hif-bus layer.

CRs-Fixed: 964031
Change-Id: I8b6f325f12aaa99e4f7461f9da26b7f60259c8f8

core/bmi/src/i_bmi.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2016 The Linux Foundation. All rights reserved.
  *
  * Previously licensed under the ISC license by Qualcomm Atheros, Inc.
  *
@@ -68,9 +68,6 @@
 #define AXI_LOCATION            0x000a0000
 #define AXI_SIZE                0x00018000
 
-#define CE_OFFSET               0x00000400
-#define CE_USEFUL_SIZE          0x00000058
-
 #define TOTAL_DUMP_SIZE         0x00200000
 #define PCIE_READ_LIMIT         0x00005000
 

core/bmi/src/ol_fw.c

@@ -473,34 +473,6 @@ static int ol_transfer_bin_file(struct ol_softc *scn, ATH_BIN_FILE file,
 	return ret;
 }
 
-int dump_ce_register(struct ol_softc *scn)
-{
-	uint32_t ce_reg_address = CE0_BASE_ADDRESS;
-	uint32_t ce_reg_values[8][CE_USEFUL_SIZE >> 2];
-	uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2;
-	uint16_t i, j;
-
-	for (i = 0; i < 8; i++, ce_reg_address += CE_OFFSET) {
-		if (hif_diag_read_mem(scn, ce_reg_address,
-			(uint8_t *) &ce_reg_values[i][0], ce_reg_word_size *
-			sizeof(uint32_t)) != CDF_STATUS_SUCCESS) {
-			BMI_ERR("Dumping CE register failed!");
-			return -EACCES;
-		}
-	}
-
-	for (i = 0; i < 8; i++) {
-		BMI_ERR("CE%d Registers:", i);
-		for (j = 0; j < ce_reg_word_size; j++) {
-			BMI_ERR("0x%08x ", ce_reg_values[i][j]);
-			if (!((j + 1) % 5) || (ce_reg_word_size - 1) == j)
-				BMI_ERR(" ");
-		}
-	}
-
-	return 0;
-}
-
 #if  defined(CONFIG_CNSS)
 
 static struct ol_softc *ramdump_scn;
@@ -536,11 +508,10 @@ static void ramdump_work_handler(struct work_struct *ramdump)
 	if (ret)
 		goto out_fail;
 
-	ret = dump_ce_register(ramdump_scn);
+	ret = hif_dump_registers(ramdump_scn);
 	if (ret)
 		goto out_fail;
 
-	dump_ce_debug_register(ramdump_scn);
 #endif
 
 	if (hif_diag_read_mem(ramdump_scn,
@@ -1597,8 +1568,8 @@ static int ol_target_coredump(void *inst, void *memory_block,
 				section_count++;
 			} else {
 				BMI_ERR("Could not read dump section!");
-				dump_ce_register(scn);
-				dump_ce_debug_register(scn);
+				if (hif_dump_registers(scn))
+					BMI_ERR("Failed to dump bus registers");
 				ol_dump_target_memory(scn, memory_block);
 				ret = -EACCES;
 				break;  /* Could not read the section */

core/hif/inc/hif.h

@@ -619,7 +619,6 @@ void hif_set_target_sleep(struct ol_softc *scn, bool sleep_ok,
 		     bool wait_for_it);
 int hif_check_fw_reg(struct ol_softc *scn);
 int hif_check_soc_status(struct ol_softc *scn);
-void dump_ce_debug_register(struct ol_softc *scn);
 void hif_get_hw_info(void *scn, u32 *version, u32 *revision,
 		     const char **target_name);
 void hif_set_fw_info(void *scn, u32 target_fw_version);
@@ -697,7 +696,7 @@ void hif_process_runtime_suspend_failure(void);
 void hif_process_runtime_resume_success(void);
 #endif
 
-int dump_ce_register(struct ol_softc *scn);
+int hif_dump_registers(struct ol_softc *scn);
 int ol_copy_ramdump(struct ol_softc *scn);
 void hif_pktlogmod_exit(void *hif_ctx);
 void hif_crash_shutdown(void *hif_ctx);

core/hif/src/ce/ce_main.c

@@ -2424,3 +2424,39 @@ static inline void hif_config_rri_on_ddr(struct ol_softc *scn)
 	return;
 }
 #endif
+
+/**
+ * hif_dump_ce_registers() - dump ce registers
+ * @scn: ol_softc pointer.
+ *
+ * Output the copy engine registers
+ *
+ * Return: 0 for success or error code
+ */
+int hif_dump_ce_registers(struct ol_softc *scn)
+{
+	uint32_t ce_reg_address = CE0_BASE_ADDRESS;
+	uint32_t ce_reg_values[8][CE_USEFUL_SIZE >> 2];
+	uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2;
+	uint16_t i, j;
+
+	for (i = 0; i < 8; i++, ce_reg_address += CE_OFFSET) {
+		if (hif_diag_read_mem(scn, ce_reg_address,
+			(uint8_t *) &ce_reg_values[i][0], ce_reg_word_size *
+			sizeof(uint32_t)) != CDF_STATUS_SUCCESS) {
+				HIF_ERROR("Dumping CE register failed!");
+				return -EACCES;
+		}
+	}
+
+	for (i = 0; i < 8; i++) {
+		HIF_ERROR("CE%d Registers:", i);
+		for (j = 0; j < ce_reg_word_size; j++) {
+			HIF_ERROR("0x%08x ", ce_reg_values[i][j]);
+			if (!((j + 1) % 5) || (ce_reg_word_size - 1) == j)
+				HIF_ERROR(" ");
+		}
+	}
+
+	return 0;
+}

core/hif/src/ce/ce_main.h

@@ -35,6 +35,9 @@
 #define CE_HTT_T2H_MSG 1
 #define CE_HTT_H2T_MSG 4
 
+#define CE_OFFSET               0x00000400
+#define CE_USEFUL_SIZE          0x00000058
+
 /**
  * enum ce_id_type
  *
@@ -129,4 +132,5 @@ struct HIF_CE_state {
 	/* Copy Engine used for Diagnostic Accesses */
 	struct CE_handle *ce_diag;
 };
+int hif_dump_ce_registers(struct ol_softc *scn);
 #endif /* __CE_H__ */

core/hif/src/hif_main.c

@@ -714,8 +714,7 @@ void hif_disable(void *hif_ctx, enum hif_disable_type type)
 
 
 /**
- * hif_crash_shutdown_dump_ce_register():
- * hif_crash_shutdown_dump_ce_register
+ * hif_crash_shutdown_dump_bus_register() - dump bus registers
  * @hif_ctx: hif_ctx
  *
  * Return: n/a
@@ -723,16 +722,15 @@ void hif_disable(void *hif_ctx, enum hif_disable_type type)
 #if defined(TARGET_RAMDUMP_AFTER_KERNEL_PANIC) \
 && defined(HIF_PCI) && defined(DEBUG)
 
-static void hif_crash_shutdown_dump_ce_register(void *hif_ctx)
+static void hif_crash_shutdown_dump_bus_register(void *hif_ctx)
 {
 	struct ol_softc *scn = hif_ctx;
 
-	if (hif_check_soc_status(scn)
-	    || dump_ce_register(scn)) {
+	if (hif_check_soc_status(scn))
 		return;
-	}
 
-	dump_ce_debug_register(scn);
+	if (hif_dump_registers(scn))
+		HIF_ERROR("Failed to dump bus registers!");
 }
 
 /**
@@ -768,7 +766,7 @@ void hif_crash_shutdown(void *hif_ctx)
 		return;
 	}
 
-	hif_crash_shutdown_dump_ce_register(hif_ctx);
+	hif_crash_shutdown_dump_bus_register(hif_ctx);
 
 	if (ol_copy_ramdump(scn))
 		goto out;

core/hif/src/pcie/if_pci.c

@@ -607,7 +607,16 @@ int hif_check_soc_status(struct ol_softc *scn)
 	return 0;
 }
 
-void dump_ce_debug_register(struct ol_softc *scn)
+/**
+ * hif_dump_pci_registers(): dump PCI debug registers
+ *
+ * This function dumps pci debug registers
+ *
+ * @scn: struct ol_softc
+ *
+ * Return: void
+ */
+static void hif_dump_pci_registers(struct ol_softc *scn)
 {
 	struct hif_pci_softc *sc = scn->hif_sc;
 	void __iomem *mem = sc->mem;
@@ -732,6 +741,27 @@ void dump_ce_debug_register(struct ol_softc *scn)
 	A_TARGET_ACCESS_END(scn);
 }
 
+/**
+ * hif_dump_registers(): dump bus debug registers
+ *
+ * This function dumps hif bus debug registers
+ *
+ * @scn: struct ol_softc
+ *
+ * Return: 0 for success or error code
+ */
+int hif_dump_registers(struct ol_softc *scn)
+{
+	int status;
+
+	status = hif_dump_ce_registers(scn);
+	if (status)
+		return status;
+	hif_dump_pci_registers(scn);
+
+	return 0;
+}
+
 /*
  * Handler for a per-engine interrupt on a PARTICULAR CE.
  * This is used in cases where each CE has a private

core/hif/src/snoc/if_snoc.c

@@ -101,7 +101,7 @@ void hif_disable_isr(void *hif_ctx)
 }
 
 /**
- * dump_ce_debug_register(): dump CE debug registers
+ * hif_dump_snoc_registers(): dump CE debug registers
  *
  * This function dumps CE debug registers
  *
@@ -109,11 +109,32 @@ void hif_disable_isr(void *hif_ctx)
  *
  * Return: void
  */
-void dump_ce_debug_register(struct ol_softc *scn)
+static void hif_dump_snoc_registers(struct ol_softc *scn)
 {
 	return;
 }
 
+/**
+ * hif_dump_registers(): dump bus debug registers
+ *
+ * This function dumps hif bus debug registers
+ *
+ * @scn: struct ol_softc
+ *
+ * Return: 0 for success or error code
+ */
+int hif_dump_registers(struct ol_softc *scn)
+{
+	int status;
+
+	status = hif_dump_ce_registers(scn);
+	if (status)
+		return status;
+	hif_dump_snoc_registers(scn);
+
+	return 0;
+}
+
 /**
  * hif_bus_suspend() - suspend the bus
  *