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@@ -4359,6 +4359,13 @@ static struct msm_platform_inst_cap_dependency instance_cap_dependency_data_volc
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NULL},
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};
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+static const u32 volcano_msm_vidc_ssr_type[] = {
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+ HFI_SSR_TYPE_SW_ERR_FATAL,
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+ HFI_SSR_TYPE_SW_DIV_BY_ZERO,
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+ HFI_SSR_TYPE_CPU_WDOG_IRQ,
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+ HFI_SSR_TYPE_NOC_ERROR,
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+};
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+
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/* Default UBWC config for LPDDR5 */
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static struct msm_vidc_ubwc_config_data ubwc_config_volcano[] = {
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UBWC_CONFIG(8, 32, 15, 0, 1, 1, 1),
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@@ -4568,6 +4575,9 @@ static const struct msm_vidc_platform_data volcano_data_v0 = {
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.dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc),
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.dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9),
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+ .msm_vidc_ssr_type = volcano_msm_vidc_ssr_type,
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+ .msm_vidc_ssr_type_size = ARRAY_SIZE(volcano_msm_vidc_ssr_type),
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+
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/* Fuse specific resources */
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.efuse_data = efuse_data_volcano,
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.efuse_data_size = ARRAY_SIZE(efuse_data_volcano),
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@@ -4632,6 +4642,9 @@ static const struct msm_vidc_platform_data volcano_data_v1 = {
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.dec_output_prop_size_hevc = ARRAY_SIZE(volcano_vdec_output_properties_hevc),
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.dec_output_prop_size_vp9 = ARRAY_SIZE(volcano_vdec_output_properties_vp9),
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+ .msm_vidc_ssr_type = volcano_msm_vidc_ssr_type,
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+ .msm_vidc_ssr_type_size = ARRAY_SIZE(volcano_msm_vidc_ssr_type),
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+
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/* Fuse specific resources */
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.efuse_data = efuse_data_volcano,
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.efuse_data_size = ARRAY_SIZE(efuse_data_volcano),
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