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disp: msm: sde: cache cwb enc mask to use during seamless transitions

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The cwb_enc_mask is set by the wb phys encoder during the validate
phase and this is in-turn used during the commit phase. During
seamless transition cases like poms with cwb, the encoders are
disabled and then enabled back after the validate phase. The cwb
flags are reset during this time leading to issues. Cache the flag
and reapply it during the modeset to avoid this case.

Change-Id: I5df1be18a5e30bb1107dc0f2e87d771a735f1ab6
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
This commit is contained in:
Veera Sundaram Sankaran
2022-10-11 14:48:08 -07:00
committed by Gerrit - the friendly Code Review server
parent 7fcbec0c8d
commit 09b2c937c2
2 changed files with 15 additions and 0 deletions
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2
msm/sde/sde_crtc.h
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@@ -508,6 +508,7 @@ struct sde_line_insertion_param {
* @input_fence_timeout_ns : Cached input fence timeout, in ns * @input_fence_timeout_ns : Cached input fence timeout, in ns
* @num_dim_layers: Number of dim layers * @num_dim_layers: Number of dim layers
* @cwb_enc_mask : encoder mask populated during atomic_check if CWB is enabled * @cwb_enc_mask : encoder mask populated during atomic_check if CWB is enabled
* @cached_cwb_enc_mask : cached encoder mask populated during atomic_check if CWB is enabled
* @dim_layer: Dim layer configs * @dim_layer: Dim layer configs
* @num_ds: Number of destination scalers to be configured * @num_ds: Number of destination scalers to be configured
* @num_ds_enabled: Number of destination scalers enabled * @num_ds_enabled: Number of destination scalers enabled
@@ -546,6 +547,7 @@ struct sde_crtc_state {
uint64_t input_fence_timeout_ns; uint64_t input_fence_timeout_ns;
uint32_t num_dim_layers; uint32_t num_dim_layers;
uint32_t cwb_enc_mask; uint32_t cwb_enc_mask;
uint32_t cached_cwb_enc_mask;
struct sde_hw_dim_layer dim_layer[SDE_MAX_DIM_LAYERS]; struct sde_hw_dim_layer dim_layer[SDE_MAX_DIM_LAYERS];
uint32_t num_ds; uint32_t num_ds;
uint32_t num_ds_enabled; uint32_t num_ds_enabled;

13
msm/sde/sde_encoder.c
View File

@@ -929,6 +929,7 @@ void sde_encoder_set_clone_mode(struct drm_encoder *drm_enc,
} }
} }
sde_crtc_state->cached_cwb_enc_mask = sde_crtc_state->cwb_enc_mask;
sde_crtc_state->cwb_enc_mask = 0; sde_crtc_state->cwb_enc_mask = 0;
} }
@@ -2604,6 +2605,8 @@ static void sde_encoder_virt_mode_set(struct drm_encoder *drm_enc,
struct sde_encoder_virt *sde_enc; struct sde_encoder_virt *sde_enc;
struct sde_kms *sde_kms; struct sde_kms *sde_kms;
struct drm_connector *conn; struct drm_connector *conn;
struct drm_crtc_state *crtc_state;
struct sde_crtc_state *sde_crtc_state;
struct sde_connector_state *c_state; struct sde_connector_state *c_state;
struct msm_display_mode *msm_mode; struct msm_display_mode *msm_mode;
struct sde_crtc *sde_crtc; struct sde_crtc *sde_crtc;
@@ -2668,6 +2671,16 @@ static void sde_encoder_virt_mode_set(struct drm_encoder *drm_enc,
if (ret) if (ret)
return; return;
crtc_state = sde_crtc->base.state;
sde_crtc_state = to_sde_crtc_state(crtc_state);
if ((sde_enc->disp_info.intf_type == DRM_MODE_CONNECTOR_VIRTUAL) &&
((sde_crtc_state->cached_cwb_enc_mask & drm_encoder_mask(drm_enc)))) {
SDE_EVT32(DRMID(drm_enc), sde_crtc_state->cwb_enc_mask,
sde_crtc_state->cached_cwb_enc_mask);
sde_crtc_state->cwb_enc_mask = sde_crtc_state->cached_cwb_enc_mask;
sde_encoder_set_clone_mode(drm_enc, crtc_state);
}
/* reserve dynamic resources now, indicating non test-only */ /* reserve dynamic resources now, indicating non test-only */
ret = sde_rm_reserve(&sde_kms->rm, drm_enc, drm_enc->crtc->state, conn->state, false); ret = sde_rm_reserve(&sde_kms->rm, drm_enc, drm_enc->crtc->state, conn->state, false);
if (ret) { if (ret) {