qcacmn: Fix REO2IPA reo destination routing

Observed that when IPA offload is enabled, RX packets
are not routed correctly to IPA ring. Currently only
IX0 of REO_DESTINATION_CTRL_IX registers are remapped,
which only covers 3-bit reo_destination_indication of
range 0 to 7.

Fix is to remap REO_DESTINATION_CTRL_IX2|3 registers
so that reo_destination_indication of range 16 to
31 can also be routed REO2IPA ring when IPA offload
is enabled. Upon IPA offload is disabled, save values
of IX2 and IX3 are reset back to HW.

Change-Id: I3428b450ab10076d27c7628a3729e8cec088bd94
CRs-Fixed: 2434331
This commit is contained in:
jiad
2019-04-12 17:42:40 +08:00
committed by nshrivas
parent e661127fa1
commit 09526ac0d1
5 changed files with 119 additions and 32 deletions

View File

@@ -692,7 +692,8 @@ QDF_STATUS dp_ipa_enable_autonomy(struct cdp_pdev *ppdev)
{
struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
struct dp_soc *soc = pdev->soc;
uint32_t remap_val;
uint32_t ix0;
uint32_t ix2;
if (!wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx))
return QDF_STATUS_SUCCESS;
@@ -704,15 +705,25 @@ QDF_STATUS dp_ipa_enable_autonomy(struct cdp_pdev *ppdev)
dp_ipa_handle_rx_buf_pool_smmu_mapping(soc, pdev, true);
/* Call HAL API to remap REO rings to REO2IPA ring */
remap_val = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) |
HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) |
HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) |
HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW);
hal_reo_remap_IX0(soc->hal_soc, remap_val);
ix0 = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) |
HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW4) |
HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) |
HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) |
HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW);
if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
ix2 = ((REO_REMAP_SW4 << 0) | (REO_REMAP_SW4 << 3) |
(REO_REMAP_SW4 << 6) | (REO_REMAP_SW4 << 9) |
(REO_REMAP_SW4 << 12) | (REO_REMAP_SW4 << 15) |
(REO_REMAP_SW4 << 18) | (REO_REMAP_SW4 << 21)) << 8;
hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
&ix2, &ix2);
}
return QDF_STATUS_SUCCESS;
}
@@ -728,21 +739,29 @@ QDF_STATUS dp_ipa_disable_autonomy(struct cdp_pdev *ppdev)
{
struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
struct dp_soc *soc = pdev->soc;
uint32_t remap_val;
uint32_t ix0;
uint32_t ix2;
uint32_t ix3;
if (!wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx))
return QDF_STATUS_SUCCESS;
/* Call HAL API to remap REO rings to REO2IPA ring */
remap_val = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) |
HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW1) |
HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW2) |
HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW3) |
HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW2) |
HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) |
HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) |
HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW);
hal_reo_remap_IX0(soc->hal_soc, remap_val);
ix0 = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) |
HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW1) |
HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW2) |
HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW3) |
HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW2) |
HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) |
HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) |
HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW);
if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
dp_reo_remap_config(soc, &ix2, &ix3);
hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
&ix2, &ix3);
}
qdf_spin_lock_bh(&soc->remap_lock);
soc->reo_remapped = false;