|
@@ -1,30 +0,0 @@
|
|
|
-COPTS += -DWLAN_CFG_PER_PDEV_TX_RING=0
|
|
|
-COPTS += -DWLAN_CFG_IPA_UC_TX_BUF_SIZE=0
|
|
|
-COPTS += -DWLAN_CFG_IPA_UC_TX_PARTITION_BASE=0
|
|
|
-COPTS += -DWLAN_CFG_IPA_UC_RX_IND_RING_COUNT=0
|
|
|
-COPTS += -DWLAN_CFG_PER_PDEV_RX_RING=0
|
|
|
-COPTS += -DWLAN_CFG_PER_PDEV_LMAC_RING=1
|
|
|
-COPTS += -DWLAN_LRO_ENABLE=0
|
|
|
-COPTS += -DWLAN_CFG_NUM_TX_EXT_DESC=0x80000
|
|
|
-COPTS += -DWLAN_CFG_INT_BATCH_THRESHOLD_TX=256
|
|
|
-COPTS += -DWLAN_CFG_INT_BATCH_THRESHOLD_RX=128
|
|
|
-COPTS += -DWLAN_CFG_INT_BATCH_THRESHOLD_OTHER=1
|
|
|
-COPTS += -DWLAN_CFG_INT_TIMER_THRESHOLD_TX=1000
|
|
|
-COPTS += -DWLAN_CFG_INT_TIMER_THRESHOLD_RX=500
|
|
|
-COPTS += -DWLAN_CFG_INT_TIMER_THRESHOLD_OTHER=1000
|
|
|
-COPTS += -DWLAN_CFG_TX_RING_SIZE=512
|
|
|
-COPTS += -DWLAN_CFG_TX_COMP_RING_SIZE=0x80000
|
|
|
-COPTS += -DWLAN_CFG_TX_FLOW_START_QUEUE_OFFSET=0
|
|
|
-COPTS += -DWLAN_CFG_TX_FLOW_STOP_QUEUE_TH=0
|
|
|
-COPTS += -DWLAN_CFG_RXDMA1_ENABLE=1
|
|
|
-COPTS += -DDP_PPDU_TXLITE_STATS_BITMASK_CFG=0xFFFF
|
|
|
-COPTS += -DDP_TX_NAPI_BUDGET_DIV_MASK=0xFFFF
|
|
|
-COPTS += -DCONFIG_PROCESS_RX_STATUS=0
|
|
|
-COPTS += -DCONFIG_PROCESS_TX_STATUS=0
|
|
|
-COPTS += -DWLAN_CFG_MAC_PER_TARGET=3
|
|
|
-ifeq ($(strip ${QCA_WIFI_QCA8074_VP}),1)
|
|
|
-COPTS+= -DWLAN_CFG_NUM_TX_DESC=0x2000
|
|
|
-else
|
|
|
-COPTS+= -DWLAN_CFG_NUM_TX_DESC=0x320000
|
|
|
-endif
|
|
|
-
|