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@@ -100,64 +100,19 @@ struct ce_irq_reg_table {
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uint32_t irq_status;
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};
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-#if !defined(QCA_WIFI_3_0_IHELIUM) && !defined(QCA_WIFI_3_0_ADRASTEA)
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+#if !defined(QCA_WIFI_3_0_ADRASTEA)
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static inline void cnss_intr_notify_q6(void)
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{
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}
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#endif
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-#if !defined(QCA_WIFI_3_0_IHELIUM) && !defined(QCA_WIFI_3_0_ADRASTEA)
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+#if !defined(QCA_WIFI_3_0_ADRASTEA)
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static inline void *cnss_get_target_smem(void)
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{
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return NULL;
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}
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#endif
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-void hif_pci_route_target_interrupt(struct hif_pci_softc *sc)
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-{
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- uint32_t target_cause0, target_cause1, target_cause2;
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- uint32_t *target_smem;
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- struct ol_softc *scn = sc->ol_sc;
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-
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- target_smem = (uint32_t *)cnss_get_target_smem();
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- if (!target_smem)
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- return;
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-
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- /* disable interrupts */
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_0_ADDRESS, 0);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_1_ADDRESS, 0);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_2_ADDRESS, 0);
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- /* read cause */
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- target_cause0 = hif_read32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_3_ADDRESS);
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- target_cause1 = hif_read32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_4_ADDRESS);
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- target_cause2 = hif_read32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_5_ADDRESS);
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- /* clear cause registers */
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_3_ADDRESS, 0xffffffff);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_4_ADDRESS, 0xffffffff);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_5_ADDRESS, 0xffffffff);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_3_ADDRESS, 0);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_4_ADDRESS, 0);
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- hif_write32_mb(sc->mem +
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- A_SOC_CORE_SCRATCH_5_ADDRESS, 0);
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- /* copy cause value to Q6 */
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- *target_smem = target_cause0;
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- *(target_smem + 1) = target_cause1;
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- *(target_smem + 2) = target_cause2;
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- if (scn->notice_send)
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- cnss_intr_notify_q6();
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-}
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-
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#ifndef QCA_WIFI_3_0_ADRASTEA
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static inline void hif_pci_route_adrastea_interrupt(struct hif_pci_softc *sc)
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{
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@@ -220,18 +175,6 @@ static irqreturn_t hif_pci_interrupt_handler(int irq, void *arg)
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hif_write32_mb(sc->mem +
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(SOC_CORE_BASE_ADDRESS |
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PCIE_INTR_ENABLE_ADDRESS), 0);
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- if (IHELIUM_BU) {
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- if (!hif_read32_mb(sc->mem + PCIE_INTR_CAUSE_ADDRESS)) {
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- hif_pci_route_target_interrupt(sc);
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-
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- hif_write32_mb(sc->mem +
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- (SOC_CORE_BASE_ADDRESS |
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- PCIE_INTR_ENABLE_ADDRESS),
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- HOST_GROUP0_MASK);
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-
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- return IRQ_HANDLED;
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- }
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- }
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hif_write32_mb(sc->mem +
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(SOC_CORE_BASE_ADDRESS | PCIE_INTR_CLR_ADDRESS),
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@@ -850,7 +793,7 @@ static void wlan_tasklet(unsigned long data)
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if (cdf_atomic_read(&scn->link_suspended))
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goto end;
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- if (!IHELIUM_BU && !ADRASTEA_BU) {
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+ if (!ADRASTEA_BU) {
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(irqreturn_t) hif_fw_interrupt_handler(sc->irq_event, scn);
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if (sc->ol_sc->target_status == OL_TRGET_STATUS_RESET)
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goto end;
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