qcacmn: HAL API changes for beryllium

Add HAL API changes for WCN7850

Change-Id: I1b5cedfee609d539ed03f103bbbc4394efddb0dc
CRs-Fixed: 2891049
This commit is contained in:
Rakesh Pillai
2021-02-16 07:28:53 -08:00
committed by Manjunathappa Prakash
parent e2f53365f8
commit 052dc539e3
6 changed files with 354 additions and 164 deletions

108
hal/wifi3.0/be/hal_be_api.h Normal file
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@@ -0,0 +1,108 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _HAL_BE_API_H_
#define _HAL_BE_API_H_
#include "hal_hw_headers.h"
#include "hal_rx.h"
#define HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr) \
((struct rx_msdu_ext_desc_info *) \
_OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
RX_MSDU_DETAILS_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
/**
* hal_reo_setup_generic_be - Initialize HW REO block
*
* @hal_soc: Opaque HAL SOC handle
* @reo_params: parameters needed by HAL for REO config
*/
void hal_reo_setup_generic_be(struct hal_soc *soc,
void *reoparams);
void hal_tx_desc_set_search_index_generic_be(void *desc, uint32_t search_index);
/**
* hal_tx_desc_set_cache_set_num_generic_be - Set the cache-set-num value
* @desc: Handle to Tx Descriptor
* @cache_num: Cache set number that should be used to cache the index
* based search results, for address and flow search.
* This value should be equal to LSB four bits of the hash value
* of match data, in case of search index points to an entry
* which may be used in content based search also. The value can
* be anything when the entry pointed by search index will not be
* used for content based search.
*
* Return: void
*/
void hal_tx_desc_set_cache_set_num_generic_be(void *desc,
uint8_t cache_num);
/**
* hal_rx_msdu_ext_desc_info_get_ptr_be() - Get the msdu extension
* descriptor pointer.
* @msdu_details_ptr: msdu details
*
* Return: msdu exntension descriptor pointer.
*/
void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr);
/**
* hal_set_link_desc_addr_be - Setup link descriptor in a buffer_addr_info
* HW structure
*
* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
* @cookie: SW cookie for the buffer/descriptor
* @link_desc_paddr: Physical address of link descriptor entry
*
*/
void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr);
/**
* hal_hw_txrx_default_ops_attach_be(): Add default ops for BE chips
* @ hal_soc_hdl: hal_soc handle
*
* Return: None
*/
void hal_hw_txrx_default_ops_attach_be(struct hal_soc *soc);
uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc);
uint8_t hal_rx_ret_buf_manager_get_be(hal_ring_desc_t ring_desc);
void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1);
void hal_rx_mpdu_desc_info_get_be(void *desc_addr, void *mpdu_desc_info);
/**
* hal_reo_qdesc_setup - Setup HW REO queue descriptor
*
* @hal_soc: Opaque HAL SOC handle
* @ba_window_size: BlockAck window size
* @start_seq: Starting sequence number
* @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
* @hw_qdesc_paddr: Physical address of REO queue descriptor memory
* @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
*
*/
void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl,
int tid, uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr,
qdf_dma_addr_t hw_qdesc_paddr,
int pn_type);
#endif /* _HAL_BE_API_H_ */

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@@ -597,9 +597,6 @@ void hal_rx_mpdu_desc_info_get_be(void *desc_addr,
mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details;
mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
// TODO - MPDU Sequence number is not there in hamilton
// mpdu_seq is just used for printing at two places
// mpdu_desc_info->mpdu_seq = HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info);
mpdu_desc_info->mpdu_flags = hal_rx_get_mpdu_flags(mpdu_info);
mpdu_desc_info->peer_meta_data =
HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info);

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@@ -496,8 +496,8 @@ hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
ppdu_info->rx_status.chan_num,
ppdu_info->rx_status.chan_freq);
}
#ifdef DP_BE_NOTYET_WAR
// TODO - timestamp is changed to 64-bit for wcn7850
#if 0
ppdu_info->com_info.ppdu_timestamp =
HAL_RX_GET(rx_tlv, RX_PPDU_START,
PPDU_START_TIMESTAMP);
@@ -1386,8 +1386,8 @@ hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
"RSSI_PRI20_CHAIN3: %d\n", rssi_value);
#ifdef DP_BE_NOTYET_WAR
// TODO - this is not preset for wcn7850
#if 0
rssi_value = HAL_RX_GET(rssi_info_tlv,
RECEIVE_RSSI_INFO, RSSI_PRI20_CHAIN4);
ppdu_info->rx_status.rssi[4] = rssi_value;

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@@ -62,6 +62,8 @@
*/
#define MAPPED_REF_OFF 0xFE0
#define HAL_OFFSET(block, field) block ## _ ## field ## _OFFSET
#ifdef ENABLE_VERBOSE_DEBUG
static inline void
hal_set_verbose_debug(bool flag)
@@ -2294,23 +2296,6 @@ uint32_t hal_get_reo_qdesc_align(hal_soc_handle_t hal_soc_hdl)
return REO_QUEUE_DESC_ALIGN;
}
/**
* hal_reo_qdesc_setup - Setup HW REO queue descriptor
*
* @hal_soc: Opaque HAL SOC handle
* @ba_window_size: BlockAck window size
* @start_seq: Starting sequence number
* @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
* @hw_qdesc_paddr: Physical address of REO queue descriptor memory
* @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
*
*/
void hal_reo_qdesc_setup(hal_soc_handle_t hal_soc_hdl,
int tid, uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr,
qdf_dma_addr_t hw_qdesc_paddr,
int pn_type);
/**
* hal_srng_get_hp_addr - Get head pointer physical address
*
@@ -2403,24 +2388,6 @@ void hal_get_meminfo(hal_soc_handle_t hal_soc_hdl, struct hal_mem_info *mem);
*/
uint32_t hal_get_target_type(hal_soc_handle_t hal_soc_hdl);
/**
* hal_get_ba_aging_timeout - Retrieve BA aging timeout
*
* @hal_soc: Opaque HAL SOC handle
* @ac: Access category
* @value: timeout duration in millisec
*/
void hal_get_ba_aging_timeout(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t *value);
/**
* hal_set_aging_timeout - Set BA aging timeout
*
* @hal_soc: Opaque HAL SOC handle
* @ac: Access category in millisec
* @value: timeout duration value
*/
void hal_set_ba_aging_timeout(hal_soc_handle_t hal_soc_hdl, uint8_t ac,
uint32_t value);
/**
* hal_srng_dst_hw_init - Private function to initialize SRNG
* destination ring HW

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@@ -21,6 +21,7 @@
#include "qdf_types.h"
#include "hal_internal.h"
#include "hal_hw_headers.h"
#include <target_type.h>
#define HAL_RX_PHY_DATA_RADAR 0x01
@@ -29,18 +30,6 @@
#define HAL_RX_FCS_LEN (4)
#define KEY_EXTIV 0x20
#define HAL_RX_USER_TLV32_TYPE_OFFSET 0x00000000
#define HAL_RX_USER_TLV32_TYPE_LSB 1
#define HAL_RX_USER_TLV32_TYPE_MASK 0x000003FE
#define HAL_RX_USER_TLV32_LEN_OFFSET 0x00000000
#define HAL_RX_USER_TLV32_LEN_LSB 10
#define HAL_RX_USER_TLV32_LEN_MASK 0x003FFC00
#define HAL_RX_USER_TLV32_USERID_OFFSET 0x00000000
#define HAL_RX_USER_TLV32_USERID_LSB 26
#define HAL_RX_USER_TLV32_USERID_MASK 0xFC000000
#define HAL_ALIGN(x, a) HAL_ALIGN_MASK(x, (a)-1)
#define HAL_ALIGN_MASK(x, mask) (typeof(x))(((uint32)(x) + (mask)) & ~(mask))
@@ -222,114 +211,24 @@ enum {
DP_PPDU_STATUS_DONE,
};
static inline
uint8_t *HAL_RX_MON_DEST_GET_DESC(uint8_t *data)
{
return data;
}
static inline
uint32_t HAL_RX_DESC_GET_MPDU_LENGTH_ERR(void *hw_desc_addr)
{
struct rx_attention *rx_attn;
struct rx_mon_pkt_tlvs *rx_desc =
(struct rx_mon_pkt_tlvs *)hw_desc_addr;
rx_attn = &rx_desc->attn_tlv.rx_attn;
return HAL_RX_GET(rx_attn, RX_ATTENTION_1, MPDU_LENGTH_ERR);
}
static inline
uint32_t HAL_RX_DESC_GET_MPDU_FCS_ERR(void *hw_desc_addr)
{
struct rx_attention *rx_attn;
struct rx_mon_pkt_tlvs *rx_desc =
(struct rx_mon_pkt_tlvs *)hw_desc_addr;
rx_attn = &rx_desc->attn_tlv.rx_attn;
return HAL_RX_GET(rx_attn, RX_ATTENTION_1, FCS_ERR);
}
/*
* HAL_RX_HW_DESC_MPDU_VALID() - check MPDU start TLV tag in MPDU
* start TLV of Hardware TLV descriptor
* @hw_desc_addr: Hardware desciptor address
*
* Return: bool: if TLV tag match
*/
static inline
bool HAL_RX_HW_DESC_MPDU_VALID(void *hw_desc_addr)
{
struct rx_mon_pkt_tlvs *rx_desc =
(struct rx_mon_pkt_tlvs *)hw_desc_addr;
uint32_t tlv_tag;
tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(
&rx_desc->mpdu_start_tlv);
return tlv_tag == WIFIRX_MPDU_START_E ? true : false;
}
/*
* HAL_RX_HW_DESC_MPDU_VALID() - check MPDU start TLV user id in MPDU
* start TLV of Hardware TLV descriptor
* @hw_desc_addr: Hardware desciptor address
*
* Return: unit32_t: user id
*/
static inline
uint32_t HAL_RX_HW_DESC_MPDU_USER_ID(void *hw_desc_addr)
{
struct rx_mon_pkt_tlvs *rx_desc =
(struct rx_mon_pkt_tlvs *)hw_desc_addr;
uint32_t user_id;
user_id = HAL_RX_GET_USER_TLV32_USERID(
&rx_desc->mpdu_start_tlv);
return user_id;
}
/* TODO: Move all Rx descriptor functions to hal_rx.h to avoid duplication */
#define HAL_RX_BUFFER_ADDR_31_0_GET(buff_addr_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET)), \
BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK, \
BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB))
#define HAL_RX_REO_ENT_BUFFER_ADDR_39_32_GET(reo_ent_desc) \
(HAL_RX_BUFFER_ADDR_39_32_GET(& \
(((struct reo_entrance_ring *)reo_ent_desc) \
->reo_level_mpdu_frame_info.msdu_link_desc_addr_info)))
#define HAL_RX_REO_ENT_BUFFER_ADDR_31_0_GET(reo_ent_desc) \
(HAL_RX_BUFFER_ADDR_31_0_GET(& \
(((struct reo_entrance_ring *)reo_ent_desc) \
->reo_level_mpdu_frame_info.msdu_link_desc_addr_info)))
#define HAL_RX_REO_ENT_BUF_COOKIE_GET(reo_ent_desc) \
(HAL_RX_BUF_COOKIE_GET(& \
(((struct reo_entrance_ring *)reo_ent_desc) \
->reo_level_mpdu_frame_info.msdu_link_desc_addr_info)))
/**
* hal_rx_reo_ent_buf_paddr_get: Gets the physical address and
* cookie from the REO entrance ring element
*
* @ hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to
* @hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to
* the current descriptor
* @ buf_info: structure to return the buffer information
* @ msdu_cnt: pointer to msdu count in MPDU
*
* CAUTION: This API calls a hal_soc ops, so be careful before calling this in
* per packet path
*
* Return: void
*/
static inline
void hal_rx_reo_ent_buf_paddr_get(hal_rxdma_desc_t rx_desc,
void hal_rx_reo_ent_buf_paddr_get(hal_soc_handle_t hal_soc_hdl,
hal_rxdma_desc_t rx_desc,
struct hal_buf_info *buf_info,
uint32_t *msdu_cnt
)
uint32_t *msdu_cnt)
{
struct reo_entrance_ring *reo_ent_ring =
(struct reo_entrance_ring *)rx_desc;
@@ -341,28 +240,29 @@ void hal_rx_reo_ent_buf_paddr_get(hal_rxdma_desc_t rx_desc,
&reo_ent_ring->reo_level_mpdu_frame_info.rx_mpdu_desc_info_details;
*msdu_cnt = HAL_RX_GET(rx_mpdu_desc_info_details,
RX_MPDU_DESC_INFO_0, MSDU_COUNT);
HAL_RX_MPDU_DESC_INFO, MSDU_COUNT);
loop_cnt = HAL_RX_GET(reo_ent_ring, REO_ENTRANCE_RING_7, LOOPING_COUNT);
loop_cnt = HAL_RX_GET(reo_ent_ring, HAL_REO_ENTRANCE_RING,
LOOPING_COUNT);
buf_addr_info =
&reo_ent_ring->reo_level_mpdu_frame_info.msdu_link_desc_addr_info;
hal_rx_buf_cookie_rbm_get(hal_soc_hdl, (uint32_t *)buf_addr_info,
buf_info);
buf_info->paddr =
(HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info) |
((uint64_t)
(HAL_RX_BUFFER_ADDR_39_32_GET(buf_addr_info)) << 32));
buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
buf_info->rbm = HAL_RX_BUF_RBM_GET(buf_addr_info);
dp_nofl_debug("[%s][%d] ReoAddr=%pK, addrInfo=%pK, paddr=0x%llx, loopcnt=%d",
__func__, __LINE__, reo_ent_ring, buf_addr_info,
(unsigned long long)buf_info->paddr, loop_cnt);
}
static inline
void hal_rx_mon_next_link_desc_get(void *rx_msdu_link_desc,
void hal_rx_mon_next_link_desc_get(hal_soc_handle_t hal_soc_hdl,
void *rx_msdu_link_desc,
struct hal_buf_info *buf_info)
{
struct rx_msdu_link *msdu_link =
@@ -371,15 +271,103 @@ void hal_rx_mon_next_link_desc_get(void *rx_msdu_link_desc,
buf_addr_info = &msdu_link->next_msdu_link_desc_addr_info;
hal_rx_buf_cookie_rbm_get(hal_soc_hdl, (uint32_t *)buf_addr_info,
buf_info);
buf_info->paddr =
(HAL_RX_BUFFER_ADDR_31_0_GET(buf_addr_info) |
((uint64_t)
(HAL_RX_BUFFER_ADDR_39_32_GET(buf_addr_info)) << 32));
buf_info->sw_cookie = HAL_RX_BUF_COOKIE_GET(buf_addr_info);
buf_info->rbm = HAL_RX_BUF_RBM_GET(buf_addr_info);
}
static inline
uint8_t *HAL_RX_MON_DEST_GET_DESC(uint8_t *data)
{
return data;
}
static inline uint32_t
hal_rx_tlv_mpdu_len_err_get(hal_soc_handle_t hal_soc_hdl, void *hw_desc_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (!hal_soc || !hal_soc->ops) {
hal_err("hal handle is NULL");
QDF_BUG(0);
return 0;
}
if (hal_soc->ops->hal_rx_tlv_mpdu_len_err_get)
return hal_soc->ops->hal_rx_tlv_mpdu_len_err_get(hw_desc_addr);
return 0;
}
static inline uint32_t
hal_rx_tlv_mpdu_fcs_err_get(hal_soc_handle_t hal_soc_hdl, void *hw_desc_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (!hal_soc || !hal_soc->ops) {
hal_err("hal handle is NULL");
QDF_BUG(0);
return 0;
}
if (hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get)
return hal_soc->ops->hal_rx_tlv_mpdu_fcs_err_get(hw_desc_addr);
return 0;
}
#ifdef notyet
/*
* HAL_RX_HW_DESC_MPDU_VALID() - check MPDU start TLV tag in MPDU
* start TLV of Hardware TLV descriptor
* @hw_desc_addr: Hardware descriptor address
*
* Return: bool: if TLV tag match
*/
static inline
bool HAL_RX_HW_DESC_MPDU_VALID(void *hw_desc_addr)
{
struct rx_mon_pkt_tlvs *rx_desc =
(struct rx_mon_pkt_tlvs *)hw_desc_addr;
uint32_t tlv_tag;
tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv);
return tlv_tag == WIFIRX_MPDU_START_E ? true : false;
}
#endif
/*
* HAL_RX_HW_DESC_MPDU_VALID() - check MPDU start TLV user id in MPDU
* start TLV of Hardware TLV descriptor
* @hw_desc_addr: Hardware descriptor address
*
* Return: unit32_t: user id
*/
static inline uint32_t
hal_rx_hw_desc_mpdu_user_id(hal_soc_handle_t hal_soc_hdl,
void *hw_desc_addr)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (!hal_soc || !hal_soc->ops) {
hal_err("hal handle is NULL");
QDF_BUG(0);
return 0;
}
if (hal_soc->ops->hal_rx_hw_desc_mpdu_user_id)
return hal_soc->ops->hal_rx_hw_desc_mpdu_user_id(hw_desc_addr);
return 0;
}
/* TODO: Move all Rx descriptor functions to hal_rx.h to avoid duplication */
/**
* hal_rx_msdu_link_desc_set: Retrieves MSDU Link Descriptor to WBM
*
@@ -389,7 +377,6 @@ void hal_rx_mon_next_link_desc_get(void *rx_msdu_link_desc,
*
* Return: void
*/
static inline
void hal_rx_mon_msdu_link_desc_set(hal_soc_handle_t hal_soc_hdl,
void *src_srng_desc,
@@ -415,8 +402,13 @@ void hal_rx_mon_msdu_link_desc_set(hal_soc_handle_t hal_soc_hdl,
*((struct buffer_addr_info *)buf_addr_info);
}
/**
* hal_get_rx_msdu_link_desc_size() - Get msdu link descriptor size
*
* Return: size of rx_msdu_link
*/
static inline
uint32 hal_get_rx_msdu_link_desc_size(void)
uint32_t hal_get_rx_msdu_link_desc_size(void)
{
return sizeof(struct rx_msdu_link);
}
@@ -752,5 +744,4 @@ hal_clear_rx_status_done(uint8_t *rx_tlv)
*(uint32_t *)rx_tlv = 0;
return QDF_STATUS_SUCCESS;
}
#endif

127
hal/wifi3.0/li/hal_li_api.h Normal file
View File

@@ -0,0 +1,127 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _HAL_LI_API_H_
#define _HAL_LI_API_H_
#include "hal_li_hw_headers.h"
#include "hal_api.h"
/**
* hal_reo_setup_generic_li - Initialize HW REO block
*
* @hal_soc: Opaque HAL SOC handle
* @reo_params: parameters needed by HAL for REO config
*/
void hal_reo_setup_generic_li(struct hal_soc *soc,
void *reoparams);
/**
* hal_set_link_desc_addr_li - Setup link descriptor in a buffer_addr_info
* HW structure
*
* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
* @cookie: SW cookie for the buffer/descriptor
* @link_desc_paddr: Physical address of link descriptor entry
*
*/
void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr);
/**
* hal_tx_desc_set_search_type_generic_li - Set the search type value
* @desc: Handle to Tx Descriptor
* @search_type: search type
* 0 Normal search
* 1 Index based address search
* 2 Index based flow search
*
* Return: void
*/
void hal_tx_desc_set_search_type_generic_li(void *desc,
uint8_t search_type);
/**
* hal_tx_desc_set_search_index_generic_li - Set the search index value
* @desc: Handle to Tx Descriptor
* @search_index: The index that will be used for index based address or
* flow search. The field is valid when 'search_type' is
* 1 0r 2
*
* Return: void
*/
void hal_tx_desc_set_search_index_generic_li(void *desc,
uint32_t search_index);
/**
* hal_tx_desc_set_cache_set_num_generic_li - Set the cache-set-num value
* @desc: Handle to Tx Descriptor
* @cache_num: Cache set number that should be used to cache the index
* based search results, for address and flow search.
* This value should be equal to LSB four bits of the hash value
* of match data, in case of search index points to an entry
* which may be used in content based search also. The value can
* be anything when the entry pointed by search index will not be
* used for content based search.
*
* Return: void
*/
void hal_tx_desc_set_cache_set_num_generic_li(void *desc,
uint8_t cache_num);
/**
* hal_tx_init_data_ring_li() - Initialize all the TCL Descriptors in SRNG
* @hal_soc_hdl: Handle to HAL SoC structure
* @hal_srng: Handle to HAL SRNG structure
*
* Return: none
*/
void hal_tx_init_data_ring_li(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl);
/**
* hal_hw_txrx_default_ops_attach_li(): Add default ops for Lithium chips
* @ hal_soc_hdl: hal_soc handle
*
* Return: None
*/
void hal_hw_txrx_default_ops_attach_li(struct hal_soc *soc);
void hal_rx_wbm_err_info_get_generic_li(void *wbm_desc, void *wbm_er_info1);
uint32_t hal_rx_wbm_err_src_get_li(hal_ring_desc_t ring_desc);
uint8_t hal_rx_ret_buf_manager_get_li(hal_ring_desc_t ring_desc);
void hal_rx_mpdu_desc_info_get_li(void *desc_addr, void *mpdu_desc_info_hdl);
/**
* hal_reo_qdesc_setup - Setup HW REO queue descriptor
*
* @hal_soc: Opaque HAL SOC handle
* @ba_window_size: BlockAck window size
* @start_seq: Starting sequence number
* @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
* @hw_qdesc_paddr: Physical address of REO queue descriptor memory
* @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
*
*/
void hal_reo_qdesc_setup_li(hal_soc_handle_t hal_soc_hdl,
int tid, uint32_t ba_window_size,
uint32_t start_seq, void *hw_qdesc_vaddr,
qdf_dma_addr_t hw_qdesc_paddr,
int pn_type);
#endif /* _HAL_LI_API_H_ */