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disp: msm: sde: proper allocation of dcwb for LMs

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During dcwb mixer allocation, resource manager allocates
the first available mixer in the free list. In dual display
uses case with 1 1 1 topology if only secondary is running
CWB then, resource manager allocates DCWB0 which leads to wb
timeout due to HW does not have the connection between LM1
and DCWB0. This change allocates proper dcwb for the LMs in RM.

Change-Id: I0c8b04b46ccad5a7d7dd591fbfa3ea0915eccdc6
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
This commit is contained in:
Mahadevan
2022-03-09 22:00:33 +05:30
parent 887b222de9
commit 04edecd269
5 changed files with 75 additions and 33 deletions
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2
msm/sde/sde_connector.h
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@@ -542,6 +542,7 @@ struct sde_misr_sign {
* @hdr_min_luminance: desired min luminance obtained from HDR block
* @hdr_supported: does the sink support HDR content
* @color_enc_fmt: Colorimetry encoding formats of sink
* @lm_mask: preferred LM mask for connector
* @allow_bl_update: Flag to indicate if BL update is allowed currently or not
* @dimming_bl_notify_enabled: Flag to indicate if dimming bl notify is enabled or not
* @qsync_mode: Cached Qsync mode, 0=disabled, 1=continuous mode
@@ -616,6 +617,7 @@ struct sde_connector {
bool hdr_supported;
u32 color_enc_fmt;
u32 lm_mask;
u8 hdr_plus_app_ver;
u32 qsync_mode;