qcacld-3.0: Carve Out hif_softc out of ol_softc
Carve out hif_softc for internal hif usage. ol_softc acts a opaque handle to other modules. Change-Id: I2f29aea93b0a64169a3e095e1d5bddca15aadbd7 CRs-Fixed: 967765
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zatwierdzone przez
Prakash Dhavali

rodzic
7fde14caba
commit
04d3d6a364
@@ -62,22 +62,22 @@
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* required to initialize pipe_cfg_addr and svc_to_pipe_map.
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*/
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struct pcie_state_s {
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A_UINT32 pipe_cfg_addr; /* Pipe configuration Target address */
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uint32_t pipe_cfg_addr; /* Pipe configuration Target address */
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/* NB: CE_pipe_config[CE_COUNT] */
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A_UINT32 svc_to_pipe_map; /* Service to pipe map Target address */
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uint32_t svc_to_pipe_map; /* Service to pipe map Target address */
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/* NB: service_to_pipe[PIPE_TO_CE_MAP_CN] */
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A_UINT32 MSI_requested; /* number of MSI interrupts requested */
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A_UINT32 MSI_granted; /* number of MSI interrupts granted */
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A_UINT32 MSI_addr; /* Message Signalled Interrupt address */
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A_UINT32 MSI_data; /* Base data */
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A_UINT32 MSI_fw_intr_data; /* Data for firmware interrupt;
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uint32_t MSI_requested; /* number of MSI interrupts requested */
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uint32_t MSI_granted; /* number of MSI interrupts granted */
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uint32_t MSI_addr; /* Message Signalled Interrupt address */
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uint32_t MSI_data; /* Base data */
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uint32_t MSI_fw_intr_data; /* Data for firmware interrupt;
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MSI data for other interrupts are
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in various SoC registers */
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A_UINT32 power_mgmt_method; /* PCIE_PWR_METHOD_* */
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A_UINT32 config_flags; /* PCIE_CONFIG_FLAG_* */
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uint32_t power_mgmt_method; /* PCIE_PWR_METHOD_* */
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uint32_t config_flags; /* PCIE_CONFIG_FLAG_* */
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};
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/*
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@@ -94,32 +94,32 @@ struct pcie_state_s {
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* Passed from Host to Target during startup (one per CE).
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*/
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struct CE_pipe_config {
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A_UINT32 pipenum;
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A_UINT32 pipedir;
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A_UINT32 nentries;
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A_UINT32 nbytes_max;
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A_UINT32 flags;
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A_UINT32 reserved;
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uint32_t pipenum;
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uint32_t pipedir;
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uint32_t nentries;
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uint32_t nbytes_max;
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uint32_t flags;
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uint32_t reserved;
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};
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/*
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* HIA Map Definition
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*/
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struct host_interest_area_t {
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A_UINT32 hi_interconnect_state;
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A_UINT32 hi_early_alloc;
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A_UINT32 hi_option_flag2;
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A_UINT32 hi_board_data;
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A_UINT32 hi_board_data_initialized;
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A_UINT32 hi_failure_state;
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A_UINT32 hi_rddi_msi_num;
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A_UINT32 hi_pcie_perst_couple_en;
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A_UINT32 hi_sw_protocol_version;
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uint32_t hi_interconnect_state;
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uint32_t hi_early_alloc;
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uint32_t hi_option_flag2;
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uint32_t hi_board_data;
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uint32_t hi_board_data_initialized;
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uint32_t hi_failure_state;
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uint32_t hi_rddi_msi_num;
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uint32_t hi_pcie_perst_couple_en;
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uint32_t hi_sw_protocol_version;
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};
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struct shadow_reg_cfg {
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A_UINT16 ce_id;
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A_UINT16 reg_offset;
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uint16_t ce_id;
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uint16_t reg_offset;
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};
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#endif /* __CEPCI_H__ */
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