qcacmn: Add support for Extended BSS IE
Add implementation to enhance structure corresponding to WMI_DCS_INTERFERENCE_EVENT_ID handler in cp stats component which hold secondary 40 and 80MHz utilization which are required parameters of Extended BSS IE Change-Id: I1c471608394d5c395632742098d2c92fc02ec238 CRs-Fixed: 2298073
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@@ -7137,6 +7137,8 @@ typedef struct _hp_dcs_mib_stats {
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* in mib structure
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* in mib structure
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* @chan_nf: Channel noise floor (Units are in dBm)
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* @chan_nf: Channel noise floor (Units are in dBm)
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* @my_bss_rx_cycle_count: BSS rx cycle count
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* @my_bss_rx_cycle_count: BSS rx cycle count
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* @reg_rxclr_ext40_cnt: extension channel 40Mhz rxclear count
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* @reg_rxclr_ext80_cnt: extension channel 80Mhz rxclear count
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*/
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*/
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typedef struct _wmi_host_dcs_im_tgt_stats {
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typedef struct _wmi_host_dcs_im_tgt_stats {
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uint32_t reg_tsf32;
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uint32_t reg_tsf32;
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@@ -7147,6 +7149,11 @@ typedef struct _wmi_host_dcs_im_tgt_stats {
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wmi_host_dcs_mib_stats_t mib_stats;
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wmi_host_dcs_mib_stats_t mib_stats;
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uint32_t chan_nf;
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uint32_t chan_nf;
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uint32_t my_bss_rx_cycle_count;
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uint32_t my_bss_rx_cycle_count;
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/* these fields are added here for backward compatibility instead of
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* wmi_host_dcs_mib_stats_t
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*/
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uint32_t reg_rxclr_ext40_cnt;
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uint32_t reg_rxclr_ext80_cnt;
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} wmi_host_dcs_im_tgt_stats_t;
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} wmi_host_dcs_im_tgt_stats_t;
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/**
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/**
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