Merge "disp: msm: sde: expose skip inline rot threshold property"

This commit is contained in:
qctecmdr
2021-04-03 05:49:01 -07:00
committed by Gerrit - the friendly Code Review server
3 changed files with 5 additions and 0 deletions

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@@ -5504,6 +5504,8 @@ static void sde_crtc_setup_capabilities_blob(struct sde_kms_info *info,
sde_kms_info_add_keyint(info, "has_src_split", catalog->has_src_split);
sde_kms_info_add_keyint(info, "has_hdr", catalog->has_hdr);
sde_kms_info_add_keyint(info, "has_hdr_plus", catalog->has_hdr_plus);
sde_kms_info_add_keyint(info, "skip_inline_rot_threshold",
catalog->skip_inline_rot_threshold);
if (catalog->uidle_cfg.uidle_rev)
sde_kms_info_add_keyint(info, "has_uidle",

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@@ -5057,6 +5057,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
sde_cfg->has_3d_merge_reset = true;
sde_cfg->has_hdr = true;
sde_cfg->has_hdr_plus = true;
sde_cfg->skip_inline_rot_threshold = true;
set_bit(SDE_MDP_DHDR_MEMPOOL_4K, &sde_cfg->mdp[0].features);
sde_cfg->has_vig_p010 = true;
sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_2_0_1;

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@@ -1496,6 +1496,7 @@ struct sde_perf_cfg {
* @cwb_blk_stride offset between each CWB blk
* @ubwc_version UBWC feature version (0x0 for not supported)
* @ubwc_bw_calc_version indicate how UBWC BW has to be calculated
* @skip_inline_rot_thresh Skip inline rotation threshold
* @has_idle_pc indicate if idle power collapse feature is supported
* @wakeup_with_touch indicate early wake up display with input touch event
* @has_hdr HDR feature support
@@ -1583,6 +1584,7 @@ struct sde_mdss_cfg {
u32 cwb_blk_stride;
u32 ubwc_version;
u32 ubwc_bw_calc_version;
bool skip_inline_rot_threshold;
bool has_idle_pc;
bool wakeup_with_touch;
u32 vbif_qos_nlvl;