video: driver: Add changes to enable AV1 Decoder

Add definitions, controls and codec-specific handling
to enable AV1 Decoder.

Change-Id: Ica2f4e298e43aa713188d3374f8705688d0ed912
Signed-off-by: Mihir Ganu <[email protected]>

driver/platform/kalama/src/msm_vidc_kalama.c

@@ -48,13 +48,14 @@
 #define H264    MSM_VIDC_H264
 #define HEVC    MSM_VIDC_HEVC
 #define VP9     MSM_VIDC_VP9
+#define AV1     MSM_VIDC_AV1
 #define HEIC    MSM_VIDC_HEIC
-#define CODECS_ALL     (H264 | HEVC | VP9 | HEIC)
+#define CODECS_ALL     (H264 | HEVC | VP9 | HEIC | AV1)
 
 static struct msm_platform_core_capability core_data_kalama[] = {
 	/* {type, value} */
 	{ENC_CODECS, H264|HEVC|HEIC},
-	{DEC_CODECS, H264|HEVC|VP9|HEIC},
+	{DEC_CODECS, H264|HEVC|VP9|AV1|HEIC},
 	{MAX_SESSION_COUNT, 16},
 	{MAX_NUM_720P_SESSIONS, 16},
 	{MAX_NUM_1080P_SESSIONS, 8},
@@ -185,6 +186,13 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C,
 		MSM_VIDC_FMT_NV12C},
 
+	{PIX_FMTS, DEC, AV1,
+		MSM_VIDC_FMT_NV12,
+		MSM_VIDC_FMT_TP10C,
+		MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C |
+		MSM_VIDC_FMT_P010 | MSM_VIDC_FMT_TP10C,
+		MSM_VIDC_FMT_NV12C},
+
 	{MIN_BUFFERS_INPUT, ENC|DEC, CODECS_ALL, 0, 64, 1, 4,
 		V4L2_CID_MIN_BUFFERS_FOR_OUTPUT},
 	{MIN_BUFFERS_OUTPUT, ENC|DEC, CODECS_ALL,
@@ -202,10 +210,10 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 	{LOSSLESS_MBPF, ENC, H264|HEVC, 64, 36864, 1, 36864},
 	/* Batch Mode Decode */
 	/* TODO: update with new values based on updated voltage corner */
-	{BATCH_MBPF, DEC, H264|HEVC|VP9, 64, 34816, 1, 34816},
+	{BATCH_MBPF, DEC, H264|HEVC|VP9|AV1, 64, 34816, 1, 34816},
 	/* (4096 * 2304) / 256 */
-	{BATCH_FPS, DEC, H264|HEVC|VP9, 1, 120, 1, 120},
-	{SECURE_MBPF, ENC|DEC, H264|HEVC|VP9, 64, 36864, 1, 36864},
+	{BATCH_FPS, DEC, H264|HEVC|VP9|AV1, 1, 120, 1, 120},
+	{SECURE_MBPF, ENC|DEC, H264|HEVC|VP9|AV1, 64, 36864, 1, 36864},
 	/* ((1920 * 1088) / 256) * 480 fps */
 	{MBPS, ENC, CODECS_ALL, 64, 3916800, 1, 3916800},
 	/* ((1920 * 1088) / 256) * 960 fps */
@@ -252,7 +260,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 	{MB_CYCLES_FW, ENC|DEC, CODECS_ALL, 326389, 326389, 1, 326389},
 	{MB_CYCLES_FW_VPP, ENC|DEC, CODECS_ALL, 44156, 44156, 1, 44156},
 
-	{SECURE_MODE, ENC|DEC, H264|HEVC|VP9,
+	{SECURE_MODE, ENC|DEC, H264|HEVC|VP9|AV1,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
 		V4L2_CID_MPEG_VIDC_SECURE,
@@ -518,7 +526,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		{STAGE},
 		msm_vidc_adjust_lowlatency_mode, NULL},
 
-	{LOWLATENCY_MODE, DEC, H264|HEVC|VP9,
+	{LOWLATENCY_MODE, DEC, H264|HEVC|VP9|AV1,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
 		V4L2_CID_MPEG_VIDC_LOWLATENCY_REQUEST,
@@ -967,7 +975,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		{0},
 		msm_vidc_adjust_entropy_mode, msm_vidc_set_u32},
 
-	{ENTROPY_MODE, DEC, H264|HEVC|VP9,
+	{ENTROPY_MODE, DEC, H264|HEVC|VP9|AV1,
 		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
 		V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
 		BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) |
@@ -1060,6 +1068,60 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		{0},
 		NULL, msm_vidc_set_u32_enum},
 
+	{PROFILE, DEC, AV1,
+		V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN,
+		V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN,
+		BIT(V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN),
+		V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN,
+		V4L2_CID_MPEG_VIDEO_AV1_PROFILE,
+		HFI_PROP_PROFILE,
+		CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		{0},
+		{0},
+		NULL, msm_vidc_set_u32_enum},
+
+	{LEVEL, DEC, AV1,
+		V4L2_MPEG_VIDEO_AV1_LEVEL_2_0,
+		V4L2_MPEG_VIDEO_AV1_LEVEL_6_1,
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_2_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_3_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_4_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_1) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_2) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_5_3) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_0) |
+		BIT(V4L2_MPEG_VIDEO_AV1_LEVEL_6_1),
+		V4L2_MPEG_VIDEO_AV1_LEVEL_6_1,
+		V4L2_CID_MPEG_VIDEO_AV1_LEVEL,
+		HFI_PROP_LEVEL,
+		CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		{0},
+		{0},
+		NULL, msm_vidc_set_u32_enum},
+
+	{AV1_TIER, DEC, AV1,
+		V4L2_MPEG_VIDEO_AV1_TIER_MAIN,
+		V4L2_MPEG_VIDEO_AV1_TIER_HIGH,
+		BIT(V4L2_MPEG_VIDEO_AV1_TIER_MAIN) |
+		BIT(V4L2_MPEG_VIDEO_AV1_TIER_HIGH),
+		V4L2_MPEG_VIDEO_AV1_TIER_HIGH,
+		V4L2_CID_MPEG_VIDEO_AV1_TIER,
+		HFI_PROP_TIER,
+		CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		{0},
+		{0},
+		NULL, msm_vidc_set_u32_enum},
+
 	{LEVEL, DEC, H264,
 		V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
 		V4L2_MPEG_VIDEO_H264_LEVEL_6_2,
@@ -1276,14 +1338,14 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		msm_vidc_adjust_chroma_qp_index_offset,
 		msm_vidc_set_chroma_qp_index_offset},
 
-	{DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9,
+	{DISPLAY_DELAY_ENABLE, DEC, H264|HEVC|VP9|AV1,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
 		V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
 		HFI_PROP_DECODE_ORDER_OUTPUT,
 		CAP_FLAG_ROOT | CAP_FLAG_INPUT_PORT},
 
-	{DISPLAY_DELAY, DEC, H264|HEVC|VP9,
+	{DISPLAY_DELAY, DEC, H264|HEVC|VP9|AV1,
 		0, 1, 1, 0,
 		V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
 		HFI_PROP_DECODE_ORDER_OUTPUT,
@@ -1348,7 +1410,7 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		0,
 		HFI_PROP_LUMA_CHROMA_BIT_DEPTH},
 
-	{CODEC_CONFIG, DEC, H264|HEVC|HEIC, 0, 1, 1, 0,
+	{CODEC_CONFIG, DEC, H264|HEVC|HEIC|AV1, 0, 1, 1, 0,
 		V4L2_CID_MPEG_VIDC_CODEC_CONFIG, 0,
 		CAP_FLAG_DYNAMIC_ALLOWED},
 
@@ -1405,6 +1467,18 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		{0}, {0},
 		NULL, NULL},
 
+	{FILM_GRAIN, DEC, AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_AV1_FILM_GRAIN_PRESENT},
+
+	{SUPER_BLOCK, DEC, AV1,
+		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
+		1, V4L2_MPEG_MSM_VIDC_DISABLE,
+		0,
+		HFI_PROP_AV1_SUPER_BLOCK_ENABLED},
+
 	{META_LTR_MARK_USE, ENC, H264|HEVC,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
@@ -1453,19 +1527,19 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
 		V4L2_CID_MPEG_VIDC_METADATA_HISTOGRAM_INFO,
 		HFI_PROP_HISTOGRAM_INFO},
 
-	{META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC,
+	{META_SEI_MASTERING_DISP, DEC|ENC, HEVC|HEIC|AV1,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
 		V4L2_CID_MPEG_VIDC_METADATA_SEI_MASTERING_DISPLAY_COLOUR,
 		HFI_PROP_SEI_MASTERING_DISPLAY_COLOUR},
 
-	{META_SEI_CLL, DEC|ENC, HEVC|HEIC,
+	{META_SEI_CLL, DEC|ENC, HEVC|HEIC|AV1,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
 		V4L2_CID_MPEG_VIDC_METADATA_SEI_CONTENT_LIGHT_LEVEL,
 		HFI_PROP_SEI_CONTENT_LIGHT_LEVEL},
 
-	{META_HDR10PLUS, DEC | ENC, HEVC|HEIC,
+	{META_HDR10PLUS, DEC | ENC, HEVC|HEIC|AV1,
 		V4L2_MPEG_MSM_VIDC_DISABLE, V4L2_MPEG_MSM_VIDC_ENABLE,
 		1, V4L2_MPEG_MSM_VIDC_DISABLE,
 		V4L2_CID_MPEG_VIDC_METADATA_HDR10PLUS,

driver/variant/iris3/src/msm_vidc_buffer_iris3.c

@@ -58,7 +58,9 @@ static u32 msm_vidc_decoder_bin_size_iris3(struct msm_vidc_inst *inst)
 	else if (inst->codec == MSM_VIDC_VP9)
 		HFI_BUFFER_BIN_VP9D(size, width, height,
 			0, num_vpp_pipes);
-
+	else if (inst->codec == MSM_VIDC_AV1)
+		HFI_BUFFER_BIN_AV1D(size, width, height, is_interlaced,
+			0, num_vpp_pipes);
 	i_vpr_l(inst, "%s: size %d\n", __func__, size);
 	return size;
 }
@@ -175,7 +177,9 @@ static u32 msm_vidc_decoder_line_size_iris3(struct msm_vidc_inst *inst)
 	else if (inst->codec == MSM_VIDC_VP9)
 		HFI_BUFFER_LINE_VP9D(size, width, height, out_min_count,
 			is_opb, num_vpp_pipes);
-
+	else if (inst->codec == MSM_VIDC_AV1)
+		HFI_BUFFER_LINE_AV1D(size, width, height, is_opb,
+			num_vpp_pipes);
 	i_vpr_l(inst, "%s: size %d\n", __func__, size);
 	return size;
 }
@@ -195,7 +199,8 @@ static u32 msm_vidc_decoder_persist_size_iris3(struct msm_vidc_inst *inst)
 		HFI_BUFFER_PERSIST_H265D(size);
 	else if (inst->codec == MSM_VIDC_VP9)
 		HFI_BUFFER_PERSIST_VP9D(size);
-
+	else if (inst->codec == MSM_VIDC_AV1)
+		HFI_BUFFER_PERSIST_AV1D(size);
 	i_vpr_l(inst, "%s: size %d\n", __func__, size);
 	return size;
 }

driver/vidc/inc/msm_vidc_internal.h

@@ -154,6 +154,7 @@ enum msm_vidc_codec_type {
 	MSM_VIDC_HEVC              = BIT(1),
 	MSM_VIDC_VP9               = BIT(2),
 	MSM_VIDC_HEIC              = BIT(3),
+	MSM_VIDC_AV1               = BIT(4),
 };
 
 enum priority_level {
@@ -439,6 +440,7 @@ enum msm_vidc_inst_capability_type {
 	PROFILE,
 	LEVEL,
 	HEVC_TIER,
+	AV1_TIER,
 	LF_MODE,
 	LF_ALPHA,
 	LF_BETA,
@@ -467,6 +469,8 @@ enum msm_vidc_inst_capability_type {
 	PRIORITY,
 	ENC_IP_CR,
 	DPB_LIST,
+	FILM_GRAIN,
+	SUPER_BLOCK,
 	ALL_INTRA,
 	META_LTR_MARK_USE,
 	META_DPB_MISR,
@@ -711,6 +715,8 @@ struct msm_vidc_subscription_params {
 	u32                    profile;
 	u32                    level;
 	u32                    tier;
+	u32                    av1_film_grain_present;
+	u32                    av1_super_block_enabled;
 };
 
 struct msm_vidc_hfi_frame_info {

driver/vidc/src/hfi_packet.c

@@ -232,6 +232,8 @@ u32 get_hfi_codec(struct msm_vidc_inst *inst)
 			return HFI_CODEC_DECODE_HEVC;
 	case MSM_VIDC_VP9:
 		return HFI_CODEC_DECODE_VP9;
+	case MSM_VIDC_AV1:
+		return HFI_CODEC_DECODE_AV1;
 	default:
 		i_vpr_e(inst, "invalid codec %d, domain %d\n",
 			inst->codec, inst->domain);

driver/vidc/src/msm_vdec.c

@@ -55,6 +55,18 @@ static const u32 msm_vdec_subscribe_for_psc_vp9[] = {
 	HFI_PROP_LEVEL,
 };
 
+static const u32 msm_vdec_subscribe_for_psc_av1[] = {
+	HFI_PROP_BITSTREAM_RESOLUTION,
+	HFI_PROP_CROP_OFFSETS,
+	HFI_PROP_LUMA_CHROMA_BIT_DEPTH,
+	HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT,
+	HFI_PROP_AV1_FILM_GRAIN_PRESENT,
+	HFI_PROP_AV1_SUPER_BLOCK_ENABLED,
+	HFI_PROP_PROFILE,
+	HFI_PROP_LEVEL,
+	HFI_PROP_TIER,
+};
+
 static const u32 msm_vdec_input_subscribe_for_properties[] = {
 	HFI_PROP_NO_OUTPUT,
 };
@@ -526,6 +538,66 @@ static int msm_vdec_set_tier(struct msm_vidc_inst *inst,
 	return rc;
 }
 
+static int msm_vdec_set_av1_film_grain_present(struct msm_vidc_inst *inst,
+	enum msm_vidc_port_type port)
+{
+	int rc = 0;
+	u32 fg_present;
+
+	if (port != INPUT_PORT && port != OUTPUT_PORT) {
+		i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
+		return -EINVAL;
+	}
+
+	inst->subcr_params[port].av1_film_grain_present =
+		inst->capabilities->cap[FILM_GRAIN].value;
+	fg_present = inst->subcr_params[port].av1_film_grain_present;
+	i_vpr_h(inst, "%s: film grain present: %d", __func__, fg_present);
+	rc = venus_hfi_session_property(inst,
+			HFI_PROP_AV1_FILM_GRAIN_PRESENT,
+			HFI_HOST_FLAGS_NONE,
+			get_hfi_port(inst, port),
+			HFI_PAYLOAD_U32_ENUM,
+			&fg_present,
+			sizeof(u32));
+	if (rc) {
+		i_vpr_e(inst, "%s: set property failed\n", __func__);
+		return rc;
+	}
+
+	return rc;
+}
+
+static int msm_vdec_set_av1_superblock_enabled(struct msm_vidc_inst *inst,
+	enum msm_vidc_port_type port)
+{
+	int rc = 0;
+	u32 sb_enabled;
+
+	if (port != INPUT_PORT && port != OUTPUT_PORT) {
+		i_vpr_e(inst, "%s: invalid port %d\n", __func__, port);
+		return -EINVAL;
+	}
+
+	inst->subcr_params[port].av1_super_block_enabled =
+		inst->capabilities->cap[SUPER_BLOCK].value;
+	sb_enabled = inst->subcr_params[port].av1_super_block_enabled;
+	i_vpr_h(inst, "%s: super block enabled: %d", __func__, sb_enabled);
+	rc = venus_hfi_session_property(inst,
+			HFI_PROP_AV1_SUPER_BLOCK_ENABLED,
+			HFI_HOST_FLAGS_NONE,
+			get_hfi_port(inst, port),
+			HFI_PAYLOAD_U32_ENUM,
+			&sb_enabled,
+			sizeof(u32));
+	if (rc) {
+		i_vpr_e(inst, "%s: set property failed\n", __func__);
+		return rc;
+	}
+
+	return rc;
+}
+
 static int msm_vdec_set_colorformat(struct msm_vidc_inst *inst)
 {
 	int rc = 0;
@@ -921,6 +993,8 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i
 		{HFI_PROP_PROFILE,                       msm_vdec_set_profile                },
 		{HFI_PROP_LEVEL,                         msm_vdec_set_level                  },
 		{HFI_PROP_TIER,                          msm_vdec_set_tier                   },
+		{HFI_PROP_AV1_FILM_GRAIN_PRESENT,        msm_vdec_set_av1_film_grain_present },
+		{HFI_PROP_AV1_SUPER_BLOCK_ENABLED,       msm_vdec_set_av1_superblock_enabled },
 	};
 
 	if (!inst || !inst->core) {
@@ -940,6 +1014,9 @@ static int msm_vdec_subscribe_input_port_settings_change(struct msm_vidc_inst *i
 	} else if (inst->codec == MSM_VIDC_VP9) {
 		subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9);
 		psc = msm_vdec_subscribe_for_psc_vp9;
+	} else if (inst->codec == MSM_VIDC_AV1) {
+		subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_av1);
+		psc = msm_vdec_subscribe_for_psc_av1;
 	} else {
 		i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec);
 		psc = NULL;
@@ -1324,6 +1401,12 @@ static int msm_vdec_read_input_subcr_params(struct msm_vidc_inst *inst)
 		msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_PROGRESSIVE, __func__);
 	else
 		msm_vidc_update_cap_value(inst, CODED_FRAMES, CODED_FRAMES_INTERLACE, __func__);
+	if (inst->codec == MSM_VIDC_AV1) {
+		msm_vidc_update_cap_value(inst, FILM_GRAIN,
+			subsc_params.av1_film_grain_present, __func__);
+		msm_vidc_update_cap_value(inst, SUPER_BLOCK,
+			subsc_params.av1_super_block_enabled, __func__);
+	}
 
 	return 0;
 }
@@ -1547,6 +1630,9 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst *
 	} else if (inst->codec == MSM_VIDC_VP9) {
 		subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_vp9);
 		psc = msm_vdec_subscribe_for_psc_vp9;
+	} else if (inst->codec == MSM_VIDC_AV1) {
+		subscribe_psc_size = ARRAY_SIZE(msm_vdec_subscribe_for_psc_av1);
+		psc = msm_vdec_subscribe_for_psc_av1;
 	} else {
 		i_vpr_e(inst, "%s: unsupported codec: %d\n", __func__, inst->codec);
 		psc = NULL;
@@ -1629,6 +1715,16 @@ static int msm_vdec_subscribe_output_port_settings_change(struct msm_vidc_inst *
 			payload_size = sizeof(u32);
 			payload_type = HFI_PAYLOAD_U32;
 			break;
+		case HFI_PROP_AV1_FILM_GRAIN_PRESENT:
+			payload[0] = subsc_params.av1_film_grain_present;
+			payload_size = sizeof(u32);
+			payload_type = HFI_PAYLOAD_U32;
+			break;
+		case HFI_PROP_AV1_SUPER_BLOCK_ENABLED:
+			payload[0] = subsc_params.av1_super_block_enabled;
+			payload_size = sizeof(u32);
+			payload_type = HFI_PAYLOAD_U32;
+			break;
 		default:
 			i_vpr_e(inst, "%s: unknown property %#x\n", __func__,
 				prop_type);

driver/vidc/src/msm_vidc_buffer.c

@@ -72,6 +72,10 @@ u32 msm_vidc_output_min_count(struct msm_vidc_inst *inst)
 		case MSM_VIDC_VP9:
 			output_min_count = 9;
 			break;
+		case MSM_VIDC_AV1:
+			// TODO: needs review
+			output_min_count = 11;
+			break;
 		case MSM_VIDC_HEIC:
 			output_min_count = 3;
 			break;
@@ -252,6 +256,7 @@ u32 msm_vidc_decoder_input_size(struct msm_vidc_inst *inst)
 
 	 /* multiply by 10/8 (1.25) to get size for 10 bit case */
 	if (f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_VP9 ||
+		f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_AV1 ||
 		f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEVC ||
 		f->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_HEIC)
 		frame_size = frame_size + (frame_size >> 2);

driver/vidc/src/msm_vidc_control.c

@@ -3684,9 +3684,12 @@ int msm_vidc_v4l2_to_hfi_enum(struct msm_vidc_inst *inst,
 	case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
 	case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
 	case V4L2_CID_MPEG_VIDEO_VP9_PROFILE:
+	case V4L2_CID_MPEG_VIDEO_AV1_PROFILE:
 	case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
 	case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
+	case V4L2_CID_MPEG_VIDEO_AV1_LEVEL:
 	case V4L2_CID_MPEG_VIDEO_HEVC_TIER:
+	case V4L2_CID_MPEG_VIDEO_AV1_TIER:
 	case V4L2_CID_MPEG_VIDC_VIDEO_BLUR_TYPES:
 		*value = capability->cap[cap_id].value;
 		return 0;

driver/vidc/src/msm_vidc_driver.c

@@ -136,6 +136,7 @@ static const struct msm_vidc_cap_name cap_name_arr[] = {
 	{PROFILE,                        "PROFILE"                    },
 	{LEVEL,                          "LEVEL"                      },
 	{HEVC_TIER,                      "HEVC_TIER"                  },
+	{AV1_TIER,                       "AV1_TIER"                   },
 	{LF_MODE,                        "LF_MODE"                    },
 	{LF_ALPHA,                       "LF_ALPHA"                   },
 	{LF_BETA,                        "LF_BETA"                    },
@@ -362,6 +363,7 @@ const char *v4l2_pixelfmt_name(u32 pixfmt)
 	case V4L2_PIX_FMT_HEVC:         return "HEVC";
 	case V4L2_PIX_FMT_HEIC:         return "HEIC";
 	case V4L2_PIX_FMT_VP9:          return "VP9";
+	case V4L2_PIX_FMT_AV1:          return "AV1";
 	/* meta port */
 	case V4L2_META_FMT_VIDC:        return "META";
 	}
@@ -507,6 +509,9 @@ enum msm_vidc_codec_type v4l2_codec_to_driver(u32 v4l2_codec, const char *func)
 	case V4L2_PIX_FMT_VP9:
 		codec = MSM_VIDC_VP9;
 		break;
+	case V4L2_PIX_FMT_AV1:
+		codec = MSM_VIDC_AV1;
+		break;
 	case V4L2_PIX_FMT_HEIC:
 		codec = MSM_VIDC_HEIC;
 		break;
@@ -531,6 +536,9 @@ u32 v4l2_codec_from_driver(enum msm_vidc_codec_type codec, const char *func)
 	case MSM_VIDC_VP9:
 		v4l2_codec = V4L2_PIX_FMT_VP9;
 		break;
+	case MSM_VIDC_AV1:
+		v4l2_codec = V4L2_PIX_FMT_AV1;
+		break;
 	case MSM_VIDC_HEIC:
 		v4l2_codec = V4L2_PIX_FMT_HEIC;
 		break;
@@ -5158,6 +5166,7 @@ static const char *get_codec_str(enum msm_vidc_codec_type type)
 	case MSM_VIDC_H264: return "h264";
 	case MSM_VIDC_HEVC: return "h265";
 	case MSM_VIDC_VP9:  return " vp9";
+	case MSM_VIDC_AV1:  return " av1";
 	case MSM_VIDC_HEIC: return "heic";
 	}
 

driver/vidc/src/venus_hfi_response.c

@@ -47,14 +47,15 @@ void print_psc_properties(const char *str, struct msm_vidc_inst *inst,
 
 	i_vpr_h(inst,
 		"%s: width %d, height %d, crop offsets[0] %#x, crop offsets[1] %#x, bit depth %#x, coded frames %d "
-		"fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d\n",
+		"fw min count %d, poc %d, color info %d, profile %d, level %d, tier %d, fg present %d, sb enabled %d\n",
 		str, (subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_WIDTH) >> 16,
 		(subsc_params.bitstream_resolution & HFI_BITMASK_BITSTREAM_HEIGHT),
 		subsc_params.crop_offsets[0], subsc_params.crop_offsets[1],
 		subsc_params.bit_depth, subsc_params.coded_frames,
 		subsc_params.fw_min_count, subsc_params.pic_order_cnt,
 		subsc_params.color_info, subsc_params.profile, subsc_params.level,
-		subsc_params.tier);
+		subsc_params.tier, subsc_params.av1_film_grain_present,
+		subsc_params.av1_super_block_enabled);
 }
 
 static void print_sfr_message(struct msm_vidc_core *core)
@@ -574,7 +575,7 @@ static int get_driver_buffer_flags(struct msm_vidc_inst *inst, u32 hfi_flags)
 	} else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B) {
 		driver_flags |= MSM_VIDC_BUF_FLAG_BFRAME;
 	} else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_I) {
-		if (inst->codec == MSM_VIDC_VP9)
+		if (inst->codec == MSM_VIDC_VP9 || inst->codec == MSM_VIDC_AV1)
 			driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME;
 	} else if (inst->hfi_frame_info.picture_type & HFI_PICTURE_CRA) {
 		driver_flags |= MSM_VIDC_BUF_FLAG_KEYFRAME;
@@ -1387,6 +1388,12 @@ static int handle_session_property(struct msm_vidc_inst *inst,
 	case HFI_PROP_TIER:
 		inst->subcr_params[port].tier = payload_ptr[0];
 		break;
+	case HFI_PROP_AV1_FILM_GRAIN_PRESENT:
+		inst->subcr_params[port].av1_film_grain_present = payload_ptr[0];
+		break;
+	case HFI_PROP_AV1_SUPER_BLOCK_ENABLED:
+		inst->subcr_params[port].av1_super_block_enabled = payload_ptr[0];
+		break;
 	case HFI_PROP_PICTURE_TYPE:
 		inst->hfi_frame_info.picture_type = payload_ptr[0];
 		if (inst->hfi_frame_info.picture_type & HFI_PICTURE_B)