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soc: Fix PCM Port Config and CLK_CTRL Writes

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Simplify register write logic for PCM ports due to multi-ee changes.
Update SWRM_MCP_CTRL to SWRM_CLK_CTRL(ee).

Change-Id: I36e78f3f2abdb65925b141d5192adf618697d674
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
This commit is contained in:
Matthew Rice
2021-12-01 14:48:00 -08:00
committed by Gerrit - the friendly Code Review server
parent e898bc09d6
commit 0209346e14
2 changed files with 23 additions and 34 deletions
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9
soc/swr-mstr-ctrl.h
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@@ -15,7 +15,7 @@
#include <linux/debugfs.h>
#include <linux/uaccess.h>
#define SWR_MSTR_MAX_REG_ADDR 0x1740
#define SWR_MSTR_MAX_REG_ADDR 0x6B160A8
#define SWR_MSTR_START_REG_ADDR 0x00
#define SWR_MSTR_MAX_BUF_LEN 32
#define BYTES_PER_LINE 12
@@ -67,13 +67,6 @@ enum {
SWR_IRQ_REGISTER,
};
enum {
SWR_DAC_PORT,
SWR_COMP_PORT,
SWR_BOOST_PORT,
SWR_VISENSE_PORT,
};
enum {
SWR_PDM = 0,
SWR_PCM,