asoc: codecs: bolero: enable gpio and clk in right sequence
Enable soundwire gpio before enabling soundwire clock so that bus clash does not happen when interrupts are received. Change-Id: I40983b8837373f1ea7ac8fa6add7c56225ff0592 Signed-off-by: Karthikeyan Mani <kmani@codeaurora.org>
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@@ -1437,8 +1437,12 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
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__func__, (enable ? "enable" : "disable"));
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if (enable) {
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if (tx_priv->swr_clk_users == 0) {
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msm_cdc_pinctrl_select_active_state(
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tx_priv->tx_swr_gpio_p);
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ret = tx_macro_mclk_enable(tx_priv, 1);
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if (ret < 0) {
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msm_cdc_pinctrl_select_sleep_state(
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tx_priv->tx_swr_gpio_p);
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dev_err(tx_priv->dev,
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"%s: request clock enable failed\n",
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__func__);
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@@ -1456,8 +1460,6 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
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BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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0x02, 0x00);
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tx_priv->reset_swr = false;
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msm_cdc_pinctrl_select_active_state(
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tx_priv->tx_swr_gpio_p);
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}
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tx_priv->swr_clk_users++;
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} else {
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@@ -1472,9 +1474,9 @@ static int tx_macro_swrm_clock(void *handle, bool enable)
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regmap_update_bits(regmap,
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BOLERO_CDC_TX_CLK_RST_CTRL_SWR_CONTROL,
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0x01, 0x00);
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tx_macro_mclk_enable(tx_priv, 0);
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msm_cdc_pinctrl_select_sleep_state(
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tx_priv->tx_swr_gpio_p);
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tx_macro_mclk_enable(tx_priv, 0);
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}
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}
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dev_dbg(tx_priv->dev, "%s: swrm clock users %d\n",
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