qcacmn: Add eMLSR support for ML STA

Add eMLSR support for ML STA. It consists of 2 changes-
1) Since POLICY_MGR_HW_MODE_EMLSR_MODE_BITPOS macro has value of 32, a new
SET BIT function has been implemented to accommodate the 64-bit operation.
2) Add eMLSR related params to peer assoc mlo param struct to update FW
via peer assoc request.

Change-Id: I6e54c632677eacabc57338b0f159d97023b100f2
CRs-Fixed: 3185010
This commit is contained in:
Gururaj Pandurangi
2022-04-15 13:18:06 -07:00
committed by Madan Koyyalamudi
parent 96ad1f2828
commit 00f755c0ce
2 changed files with 16 additions and 2 deletions

View File

@@ -1,6 +1,6 @@
/* /*
* Copyright (c) 2014-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* *
* Permission to use, copy, modify, and/or distribute this software for * Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the * any purpose with or without fee is hereby granted, provided that the
@@ -133,6 +133,14 @@ typedef __qdf_wait_queue_head_t qdf_wait_queue_head_t;
(_var) |= (((_val) & ((1 << (_num_bits)) - 1)) << (_index)); \ (_var) |= (((_val) & ((1 << (_num_bits)) - 1)) << (_index)); \
} while (0) } while (0)
#define QDF_SET_BITS64(_var, _tmp, _index, _num_bits, _val) do { \
(_var) = (((_var) & 0xffffffff00000000) >> 32); \
(_var) &= ~(((1 << (_num_bits)) - 1) << ((_index) - 32)); \
(_var) |= (((_val) & ((1 << (_num_bits)) - 1)) << ((_index) - 32)); \
(_var) = (((_var) & 0x00000000ffffffff) << 32); \
(_var) |= ((_tmp) & 0x00000000ffffffff); \
} while (0)
/* Get number of bits from the index bit supporting 64 bits */ /* Get number of bits from the index bit supporting 64 bits */
#define QDF_GET_BITS64(_val, _index, _num_bits) \ #define QDF_GET_BITS64(_val, _index, _num_bits) \
(((_val) >> (_index)) & ((1LLU << (_num_bits)) - 1)) (((_val) >> (_index)) & ((1LLU << (_num_bits)) - 1))

View File

@@ -1118,9 +1118,12 @@ struct wmi_host_tid_to_link_map_params {
* @mlo_logical_link_index_valid: indicate if the logial link index in is valid * @mlo_logical_link_index_valid: indicate if the logial link index in is valid
* @mlo_peer_id_valid: indicate if the mlo peer id is valid * @mlo_peer_id_valid: indicate if the mlo peer id is valid
* @mlo_force_link_inactive: force the peer inactive * @mlo_force_link_inactive: force the peer inactive
* @emlsr_support: indicate if eMLSR supported
* @mld_mac: MLD mac address * @mld_mac: MLD mac address
* @logical_link_index: Unique index for links of the mlo. Starts with Zero * @logical_link_index: Unique index for links of the mlo. Starts with Zero
* @ml_peer_id: ML peer id if generated by host. Otherwise invalid peer id * @ml_peer_id: ML peer id if generated by host. Otherwise invalid peer id
* @ieee_link_id: peer link ID
* @emlsr_trans_timeout: Transition timeout value from peer for eMLSR links
*/ */
struct peer_assoc_mlo_params { struct peer_assoc_mlo_params {
uint32_t mlo_enabled:1, uint32_t mlo_enabled:1,
@@ -1129,10 +1132,13 @@ struct peer_assoc_mlo_params {
mlo_logical_link_index_valid:1, mlo_logical_link_index_valid:1,
mlo_peer_id_valid:1, mlo_peer_id_valid:1,
mlo_force_link_inactive:1, mlo_force_link_inactive:1,
unused:26; emlsr_support:1,
unused:25;
uint8_t mld_mac[QDF_MAC_ADDR_SIZE]; uint8_t mld_mac[QDF_MAC_ADDR_SIZE];
uint32_t logical_link_index; uint32_t logical_link_index;
uint32_t ml_peer_id; uint32_t ml_peer_id;
uint32_t ieee_link_id;
uint32_t emlsr_trans_timeout;
}; };
/** /**