qcacmn: Add eMLSR support for ML STA
Add eMLSR support for ML STA. It consists of 2 changes- 1) Since POLICY_MGR_HW_MODE_EMLSR_MODE_BITPOS macro has value of 32, a new SET BIT function has been implemented to accommodate the 64-bit operation. 2) Add eMLSR related params to peer assoc mlo param struct to update FW via peer assoc request. Change-Id: I6e54c632677eacabc57338b0f159d97023b100f2 CRs-Fixed: 3185010
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committed by
Madan Koyyalamudi

parent
96ad1f2828
commit
00f755c0ce
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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@@ -133,6 +133,14 @@ typedef __qdf_wait_queue_head_t qdf_wait_queue_head_t;
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(_var) |= (((_val) & ((1 << (_num_bits)) - 1)) << (_index)); \
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} while (0)
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#define QDF_SET_BITS64(_var, _tmp, _index, _num_bits, _val) do { \
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(_var) = (((_var) & 0xffffffff00000000) >> 32); \
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(_var) &= ~(((1 << (_num_bits)) - 1) << ((_index) - 32)); \
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(_var) |= (((_val) & ((1 << (_num_bits)) - 1)) << ((_index) - 32)); \
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(_var) = (((_var) & 0x00000000ffffffff) << 32); \
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(_var) |= ((_tmp) & 0x00000000ffffffff); \
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} while (0)
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/* Get number of bits from the index bit supporting 64 bits */
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#define QDF_GET_BITS64(_val, _index, _num_bits) \
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(((_val) >> (_index)) & ((1LLU << (_num_bits)) - 1))
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