qcacmn: Move hif_targ_is_awake to pci

Avoid maintaining a dummy api for the internal function.

Change-Id: Ie26aaf557d1bdefe292aa364fa6ec3140a113f5e
CRs-Fixed: 986480
This commit is contained in:
Houston Hoffman
2016-03-14 21:11:47 -07:00
committed by Vishwajith Upendra
parent b861cb3837
commit 00d42aeb8e
5 changed files with 32 additions and 66 deletions

View File

@@ -142,29 +142,6 @@ A_target_id_t hif_get_target_id(struct hif_softc *scn)
return scn->mem;
}
/**
* hif_target_forced_awake(): hif_target_forced_awake
* @scn: scn
*
* Return: bool
*/
bool hif_target_forced_awake(struct hif_softc *scn)
{
A_target_id_t addr = scn->mem;
bool awake;
bool forced_awake;
awake = hif_targ_is_awake(scn, addr);
forced_awake =
!!(hif_read32_mb
(addr + PCIE_LOCAL_BASE_ADDRESS +
PCIE_SOC_WAKE_ADDRESS) & PCIE_SOC_WAKE_V_MASK);
return awake && forced_awake;
}
static inline void hif_fw_event_handler(struct HIF_CE_state *hif_state)
{
struct hif_msg_callbacks *msg_callbacks =

View File

@@ -153,7 +153,6 @@ struct hif_softc {
A_target_id_t hif_get_target_id(struct hif_softc *scn);
void hif_dump_pipe_debug_count(struct hif_softc *scn);
bool hif_target_forced_awake(struct hif_softc *scn);
bool hif_max_num_receives_reached(struct hif_softc *scn, unsigned int count);
int hif_bus_configure(struct hif_softc *scn);
int hif_config_ce(struct hif_softc *scn);
@@ -176,7 +175,6 @@ int hif_get_device_type(uint32_t device_id,
uint32_t revision_id,
uint32_t *hif_type, uint32_t *target_type);
/*These functions are exposed to HDD*/
bool hif_targ_is_awake(struct hif_softc *scn, void *__iomem *mem);
void hif_nointrs(struct hif_softc *scn);
void hif_bus_close(struct hif_softc *ol_sc);
QDF_STATUS hif_bus_open(struct hif_softc *ol_sc,

View File

@@ -101,8 +101,6 @@ extern int hif_target_sleep_state_adjust(struct hif_softc *scn,
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_OK(scn) 1
#define A_TARGET_ACCESS_LIKELY(scn) \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
@@ -205,8 +203,6 @@ do { \
#define Q_TARGET_ACCESS_END(scn) \
hif_target_sleep_state_adjust(scn, true, false)
#define A_TARGET_ACCESS_OK(scn) hif_target_forced_awake(scn)
#if CONFIG_ATH_PCIE_ACCESS_LIKELY
#define A_TARGET_ACCESS_LIKELY(scn) \
hif_target_sleep_state_adjust(scn, false, false)

View File

@@ -284,11 +284,6 @@ static irqreturn_t hif_pci_msi_fw_handler(int irq, void *arg)
return IRQ_HANDLED;
}
bool hif_targ_is_awake(struct hif_softc *scn, void *__iomem *mem)
{
HIF_PCI_TARG_IS_AWAKE(scn, mem);
}
bool hif_pci_targ_is_present(struct hif_softc *scn, void *__iomem *mem)
{
return 1; /* FIX THIS */
@@ -337,6 +332,38 @@ inline void hif_pci_cancel_deferred_target_sleep(struct hif_softc *scn)
hif_write32_mb(((char *)(mem) + \
PCIE_LOCAL_BASE_ADDRESS + (uint32_t)(addr)), (val))
#ifdef QCA_WIFI_3_0
/**
* hif_targ_is_awake() - check to see if the target is awake
* @hif_ctx: hif context
*
* emulation never goes to sleep
*
* Return: true if target is awake
*/
bool hif_targ_is_awake(struct hif_softc *hif_ctx, void *__iomem *mem)
{
return true;
}
#else
/**
* hif_targ_is_awake() - check to see if the target is awake
* @hif_ctx: hif context
*
* Return: true if the targets clocks are on
*/
bool hif_targ_is_awake(struct hif_softc *scn, void *__iomem *mem)
{
uint32_t val;
if (scn->recovery)
return false;
val = hif_read32_mb(mem + PCIE_LOCAL_BASE_ADDRESS
+ RTC_STATE_ADDRESS);
return RTC_STATE_V_GET(val) == RTC_STATE_V_ON;
}
#endif
#define ATH_PCI_RESET_WAIT_MAX 10 /* Ms */
static void hif_pci_device_reset(struct hif_pci_softc *sc)
{
@@ -2899,9 +2926,6 @@ uint32_t hif_target_read_checked(struct hif_softc *scn, uint32_t offset)
uint32_t value;
void *addr;
if (!A_TARGET_ACCESS_OK(scn))
hi_fdebug();
addr = scn->mem + offset;
value = A_PCI_READ32(addr);
@@ -2926,9 +2950,6 @@ hif_target_write_checked(struct hif_softc *scn, uint32_t offset, uint32_t value)
{
void *addr;
if (!A_TARGET_ACCESS_OK(scn))
hi_fdebug();
addr = scn->mem + (offset);
hif_write32_mb(addr, value);
@@ -2946,17 +2967,6 @@ hif_target_write_checked(struct hif_softc *scn, uint32_t offset, uint32_t value)
}
}
/**
* hi_fdebug() - not needed in PCI
*
*
* Return: n/a
*/
void hi_fdebug(void)
{
/* BUG_ON(1); */
}
/**
* hif_target_dump_access_log() - dump access log
*

View File

@@ -61,22 +61,7 @@
hif_write32_mb(sc->mem + PCIE_INTR_CLR_ADDRESS, 0); \
hif_read32_mb(sc->mem + PCIE_INTR_CLR_ADDRESS); \
}
#define HIF_PCI_TARG_IS_AWAKE(scn, mem) \
{ \
return 1; \
}
#else
#define PCI_CLR_CAUSE0_REGISTER(sc)
#define HIF_PCI_TARG_IS_AWAKE(scn, mem) \
{ \
uint32_t val; \
if (scn->recovery) \
return false; \
val = hif_read32_mb(mem + PCIE_LOCAL_BASE_ADDRESS \
+ RTC_STATE_ADDRESS); \
return RTC_STATE_V_GET(val) == RTC_STATE_V_ON; \
}
#endif
#endif /* __IF_PCI_INTERNAL_H__ */