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wsa: soundwire: Add support for 4p8MHz DAC rate

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Add support to use 4p8MHz DAC rate for receiver over WSA.

Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
2021-03-01 19:58:10 +05:30
committed by Gerrit - the friendly Code Review server
parent ae258cb2f8
commit 001ba433b2
7 changed files with 80 additions and 8 deletions
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24
asoc/codecs/wsa883x/wsa883x.c
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@@ -1041,6 +1041,8 @@ static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
if (wsa883x->dev_mode == RECEIVER)
ch_rate[num_port] = SWR_CLK_RATE_4P8MHZ;
++num_port;
if (wsa883x->comp_enable) {
@@ -1113,20 +1115,32 @@ static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w,
dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
switch (event) {
case SND_SOC_DAPM_POST_PMU:
swr_slvdev_datapath_control(wsa883x->swr_slave,
wsa883x->swr_slave->dev_num,
true);
/* Added delay as per HW sequence */
usleep_range(250, 300);
if (wsa883x->dev_mode == RECEIVER) {
snd_soc_component_update_bits(component,
WSA883X_CDC_PATH_MODE,
0x02, 0x02);
snd_soc_component_update_bits(component,
WSA883X_SPKR_PWM_CLK_CTL,
0x08, 0x08);
snd_soc_component_update_bits(component,
WSA883X_DRE_CTL_0,
0xF0, 0x00);
} else if (wsa883x->dev_mode == SPEAKER) {
snd_soc_component_update_bits(component,
WSA883X_CDC_PATH_MODE,
0x02, 0x00);
snd_soc_component_update_bits(component,
WSA883X_SPKR_PWM_CLK_CTL,
0x08, 0x00);
snd_soc_component_update_bits(component,
WSA883X_DRE_CTL_0,
0xF0, 0x90);
}
swr_slvdev_datapath_control(wsa883x->swr_slave,
wsa883x->swr_slave->dev_num,
true);
/* Added delay as per HW sequence */
usleep_range(250, 300);
snd_soc_component_update_bits(component,
WSA883X_DRE_CTL_1,
0x01, 0x01);